IP Library Granted Patent US 8,305,142
Granted Patent B2
US 8,305,142 · App. 12/959,986 · Granted Nov 6, 2012

Third order intermodulation cancellation by in-line generated signal

Assignee: Linear Technology Corporation
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Quick Facts
Patent No.
US 8,305,142
App. No.
12/959,986
Granted
Nov 6, 2012
Kind
B2
Abstract

An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation (IM3) products. A single-port predistortion circuit is connected at a single node of an input line to the amplifier via an AC coupling capacitor. The fundamental frequency of the input signal is applied to a forward biased diode junction. The current through the diode is applied to a second capacitor. The appropriate setting of a tuning device, such as a tunable resistor or a tunable capacitor, causes the predistortion circuit to invert the second harmonic generated by the diode. The inverted second harmonic signal is applied to the single node of the input line to add predistortion to the signal applied to the amplifier. The predistortion cancels or substantially reduces the IM3 products at the output of the amplifier.

Claims (30)

1. A circuit comprising:

a first node for passing a first input signal for amplification by an amplifier, the first input signal having a fundamental frequency, the amplifier being assumed to add unwanted distortion to an amplified first input signal stemming from generation of a multi-ordered harmonic of the fundamental frequency; and

a predistortion circuit connected to the first node without being connected to the output of the amplifier, the predistortion circuit comprising:

a single input/output node coupled to the first node, wherein the single input/output node both receives the first input signal at the first node and provides at the first node a predistortion output signal of the predistortion circuit, derived from the first input signal, that is applied to an input of the amplifier;

a first capacitor having a first terminal connected to receive the fundamental frequency, the first capacitor having a second terminal;

a forward biased diode junction connected to receive the fundamental frequency from the second terminal, the diode junction conducting a forward biased current and generating at least a second harmonic of the fundamental frequency; and

a second capacitor connected to the diode, the second capacitor receiving at least some of the forward biased current such that a combination of at least the diode and the second capacitor generates an inverted signal having a frequency approximately equal to the second harmonic of the fundamental frequency, wherein the inverted signal is coupled through the first capacitor to the first node for providing the predistortion output signal to the first input signal.

2. The circuit of claim 1 wherein the diode is a base-emitter junction of a bipolar transistor.

3. The circuit of claim 2 wherein the second capacitor is coupled to an emitter of the transistor.

4. The circuit of claim 1 further comprising a tunable resistance connected in series with the diode and the second capacitor, the tunable resistor being tunable to select a signal to invert having the frequency approximately equal to the second harmonic of the fundamental frequency.

5. The circuit of claim 4 wherein the circuit is housed in a package having terminals, wherein at least one terminal is connected to select a resistance value.

6. The circuit of claim 4 wherein the circuit is housed in a package, and wherein the tunable resistance is within the package.

7. The circuit of claim 1 further comprising a DC bias circuit operating the diode within a certain forward-biased operating range.

8. The circuit of claim 1 further comprising a tunable capacitor connected across the diode, the tunable capacitor being tunable to select a signal to invert having the frequency approximately equal to the second harmonic of the fundamental frequency.

9. The circuit of claim 8 wherein the tunable capacitor comprises a MOSFET.

10. The circuit of claim 9 wherein the circuit is housed in a package having terminals, wherein at least one terminal is connected to select a tunable capacitance.

11. The circuit of claim 1 wherein the amplifier and predistortion circuit are formed as a single integrated circuit within a package.

12. The circuit of claim 1 wherein the predistortion circuit is tunable to invert a signal, having the frequency approximately equal to the second harmonic of the fundamental frequency, within a certain range of frequencies.

13. The circuit of claim 12 wherein the range of frequencies is RF.

14. A method of reducing distortion output from an amplifier, the amplifier receiving a first input signal for amplification, the first input signal having a fundamental frequency, the amplifier adding unwanted distortion to an amplified first input signal stemming from generation of a multi-ordered harmonic of the fundamental frequency, the method comprising:

receiving the fundamental frequency at a first terminal of a first capacitor, the first capacitor having a second terminal, wherein the first terminal is an input/output node of a predistortion circuit that, at the first terminal, both receives the first input signal and provides a predistortion output signal of the predistortion circuit, derived from the first input signal, that is applied to an input of the amplifier without being applied to the output of the amplifier;

generating at least a second harmonic of the fundamental frequency by a forward biased diode coupled to the second terminal of the first capacitor;

applying a current through the diode to a second capacitor, wherein a combination of at least the diode and the second capacitor generates an inverted signal having a frequency approximately equal to the second harmonic; and

coupling the inverted signal through the first capacitor to the first terminal, as the predistortion output signal of the predistortion circuit, for providing predistortion to the first input signal applied to the amplifier.

15. The method of claim 14 wherein the diode is a base-emitter junction of a bipolar transistor.

16. The method of claim 15 wherein the second capacitor is coupled to an emitter of the transistor.

17. The method of claim 14 further comprising selecting a resistance connected in series with the diode and the second capacitor to select a signal to invert having the frequency approximately equal to the second harmonic of the fundamental frequency.

18. The method of claim 17 wherein selecting the resistance comprises tuning a tunable resistance.

19. The method of claim 14 further comprising tuning a tunable capacitor connected across the diode to select a signal to invert having the frequency approximately equal to the second harmonic of the fundamental frequency.

20. The method of claim 14 wherein the inverted signal is tunable using at least one of mask programming, one or more external signals applied to integrated circuit package terminals, or a component connected to one or more integrated circuit package terminals.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2021
From: LINEAR TECHNOLOGY LLC
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 057888/0345 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2021
From: LINEAR TECHNOLOGY CORPORATION
To: LINEAR TECHNOLOGY LLC
Reel/Frame 058303/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2010
From: FUNG, GREGORY A.
To: LINEAR TECHNOLOGY CORPORATION
Reel/Frame 025443/0166 →
Continuity (1)
Related Publication 20120139629A1 · Jun 7, 2012