Multiply-connected power processing
View Patent ↗Various power processing systems are described that employ a multiply-connected velocity inhibiting circuit. At least one active circuit is employed to synthesize at least one passive lumped element in the multiply-connected velocity inhibiting circuit.
1. An apparatus, comprising:
a multiply-connected velocity inhibiting circuit;
at least one active circuit in the multiply-connected velocity inhibiting circuit, the at least one active circuit synthesizing at least one passive lumped element in the multiply-connected velocity inhibiting circuit;
a source coupler coupling an alternating current (AC) power source to the multiply-connected velocity inhibiting circuit;
a control circuit coupled to the source coupler, the control circuit being configured to control a rate at which an AC power from the AC power source enters the multiply-connected velocity inhibiting circuit; and
wherein the control circuit receives an input signal that indicates a state of a power voltage of the AC power from the AC power source, where the control circuit determines the rate at which the AC power from the AC power source enters the multiply-connected velocity inhibiting circuit based at least in part upon the input signal.
2. The apparatus of claim 1 , further comprising at least one direct current (DC) power source coupled to the at least one active circuit.
3. The apparatus of claim 1 , further comprising at least one alternating current (AC) power source coupled to a power input of the at least one active circuit.
4. The apparatus of claim 1 , wherein the control circuit is further coupled to the at least one active circuit, the control circuit dynamically controlling a gain of the at least one active circuit.
5. The apparatus of claim 1 , further comprising a load coupler coupling an electrical load to the multiply-connected velocity inhibiting circuit.
6. The apparatus of claim 5 , wherein the control circuit is coupled to the load coupler, the control circuit being configured to control a rate at which the AC power is diverted from the multiply-connected velocity inhibiting circuit to the electrical load.
7. The apparatus of claim 1 , wherein the at least one active circuit further comprises a low pass filter.
8. The apparatus of claim 1 , wherein the at least one active circuit further comprises a high pass filter.
9. The apparatus of claim 1 , wherein the at least one active circuit further comprises an operational amplifier.
10. The apparatus of claim 1 , wherein the at least one active circuit further comprises a gyrator.
11. The apparatus of claim 1 , wherein the at least one active circuit synthesizes a floating inductance.
12. The apparatus of claim 11 , wherein the floating inductance comprises at least one gyrator.
13. The apparatus of claim 1 , wherein the at least one active circuit synthesizes a floating parametric inductance.
14. The apparatus of claim 1 , wherein the at least one active circuit further comprises at least one gyrator coupled to a capacitance, where the capacitance is time-varying.
15. The apparatus of claim 1 , wherein the at least one active circuit synthesizes a parametric reactance.
16. The apparatus of claim 1 , wherein the at least one active circuit further comprises a variable gain.
17. The apparatus of claim 16 , wherein the control circuit controls the variable gain of the at least one active circuit.
18. An apparatus, comprising:
a multiply-connected velocity inhibiting circuit;
at least one active circuit in the multiply-connected velocity inhibiting circuit, the at least one active circuit synthesizing at least one passive lumped element in the multiply-connected velocity inhibiting circuit;
a load coupler coupling an electrical load to the multiply-connected velocity inhibiting circuit;
a control system coupled to the load coupler, the control system being configured to control a rate at which an alternating current (AC) power is diverted from the multiply-connected velocity inhibiting circuit to the electrical load; and
wherein the control system receives an input signal from the electrical load, the input signal indicating a magnitude of the electrical load, where the control system determines the rate at which the AC power is diverted from the multiply-connected velocity inhibiting circuit to the electrical load based at least in part upon the input signal.
19. A method, comprising the steps of:
propagating a power signal in a multiply-connected velocity inhibiting circuit;
synthesizing at least one passive lumped element in the multiply-connected velocity inhibiting circuit using at least one active circuit;
directing alternating current (AC) power into the multiply-connected velocity inhibiting circuit from an AC power source; and
determining a rate at which the AC power from the AC power source enters the multiply-connected velocity inhibiting circuit based at least in part upon an input signal that indicates a state of a power voltage of the AC power from the AC power source.
20. The method of claim 19 , further comprising the step of applying direct current (DC) power to the at least one active circuit from at least one DC power source.
21. The method of claim 19 , further comprising the step of applying alternating current (AC) power to the at least one active circuit from at least one AC power source.
22. The method of claim 19 , further comprising the step of diverting the AC power out of the multiply-connected velocity inhibiting circuit to an electrical load.
23. The method of claim 19 , wherein the at least one passive lumped element is synthesized by an active circuit that comprises a low pass filter.
24. The method of claim 19 , wherein the at least one passive lumped element is synthesized by an active circuit that comprises a high pass filter.
25. The method of claim 19 , wherein the at least one passive lumped element is synthesized by an active circuit that comprises an operational amplifier.
26. The method of claim 19 , wherein the at least one passive lumped element is synthesized by an active circuit that comprises a gyrator.
27. The method of claim 19 , wherein the at least one active circuit synthesizes a floating inductance.
28. The method of claim 27 , wherein the floating inductance is synthesized by at least one gyrator.
29. The method of claim 19 , wherein the at least one active circuit synthesizes a floating parametric inductance.
30. The method of claim 19 , wherein the at least one active circuit further comprises at least one gyrator coupled to a capacitance, the method further comprising the step of varying the capacitance over time.
31. The method of claim 19 , wherein the at least one active circuit synthesizes a parametric reactance.
32. A system, comprising:
a multiply-connected velocity inhibiting circuit; and
means for synthesizing at least one passive lumped element comprising a parametric reactance in the multiply-connected velocity inhibiting circuit.