IP Library Granted Patent US 8,319,302
Granted Patent B2
US 8,319,302 · App. 12/665,876 · Granted Nov 27, 2012

Wafer arrangement and a method for manufacturing the wafer arrangement

Assignee: Agency for Science, Technology and Research
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Quick Facts
Patent No.
US 8,319,302
App. No.
12/665,876
Granted
Nov 27, 2012
Kind
B2
Abstract

The wafer arrangement ( 100 ) provided comprises a first wafer ( 101 ), which comprises an integrated circuit and a recess ( 105 ). The wafer arrangement further comprises a portion of a second wafer ( 103 ), which comprises a carrier portion and a protrusion ( 107 ), the protrusion comprising an active component or actively controlled component ( 109 ) such as a MEMS component, wherein the portion of the second wafer ( 103 ) is coupled to the first wafer ( 101 ) such that the protrusion ( 107 ) is received in the recess ( 105 ). The invention provides a mechanism for accurately aligning an active component ( 109 ) on the second wafer ( 103 ) with components on the first wafer ( 101 ), such as photonic, electronic or optical components.

Claims (43)

1. A wafer arrangement, comprising:

a first wafer, the first wafer comprising:

an integrated circuit;

a recess;

a portion of a second wafer, the portion of the second wafer comprising:

a carrier portion;

a silicon island structure protrusion, the protrusion comprising an active component or an actively controlled component;

wherein the portion of the second wafer is coupled to the first wafer such that the protrusion is received in the recess.

2. The wafer arrangement of claim 1 , wherein the first wafer is a silicon wafer.

3. The wafer arrangement of claim 1 , wherein the first wafer is a silicon-on-insulator wafer.

4. The wafer arrangement of claim 1 , wherein the integrated circuit comprises a control circuit to control the active component or the actively controlled component.

5. The wafer arrangement of claim 4 , wherein the control circuit comprises an electronic control circuit or a photonic control circuit.

6. The wafer arrangement of claim 1 , wherein the first wafer further comprises a photonic device.

7. The wafer arrangement of claim 6 , wherein the photonic device is a photonic device selected from a group of photonic devices consisting of:

a waveguide structure,

a laser component,

a mirror,

a modulator,

a photo-detector,

a wavelength converter, and

an amplifier.

8. The wafer arrangement of claim 1 , wherein the first wafer further comprises a further recess.

9. The wafer arrangement of claim 8 , wherein the further recess is configured to receive an optical component.

10. The wafer arrangement of claim 9 , further comprising:

an optical component arranged in the further recess of the first wafer.

11. The wafer arrangement of claim 1 , wherein the second wafer is a silicon wafer.

12. The wafer arrangement of claim 1 , wherein the second wafer is a silicon-on-insulator wafer.

13. The wafer arrangement of claim 1 , wherein the carrier portion is a thinned portion of the second wafer.

14. The wafer arrangement of claim 1 , wherein the active component or the actively controlled component is a micro-electro-mechanical system component.

15. The wafer arrangement of claim 14 , wherein the micro-electro-mechanical system component is a micro-electro-mechanical system component selected from a group of micro-electro-mechanical system components consisting of:

a mirror,

a grating,

a switch, and

a cantilever structure.

16. The wafer arrangement of claim 1 , wherein the recess has a depth in the range from about 1 μm to about 500 μm.

17. The wafer arrangement of claim 1 , wherein the protrusion protrudes from the surface of the second wafer by about 1 μm to about 500 μm.

18. The wafer arrangement of claim 1 , wherein the portion of the second wafer is wafer bonded to the first wafer such that the protrusion is received in the recess.

19. A method for manufacturing a wafer arrangement, the method comprising:

forming a recess in a first wafer, wherein the first wafer includes an integrated circuit;

forming a silicon island structure protrusion on a second wafer;

coupling the second wafer to the first wafer such that the protrusion is received in the recess;

forming an active component or an actively controlled component in the protrusion.

20. The method of claim 19 , wherein the first wafer is a silicon wafer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2019
From: THE AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
To: ADVANCED MICRO FOUNDRY PTE. LTD.
Reel/Frame 050071/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2010
From: ZHANG, QINGXIN; LO, GUO-QIANG PATRICK; YU, MINGBIN; KWONG, DIM-LEE
To: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
Reel/Frame 024071/0239 →
Continuity (2)
Provisional Application 60945660 · Jun 22, 2007
Related Publication 20100219496A1 · Sep 2, 2010