IP Library Granted Patent US 8,352,652
Granted Patent B2
US 8,352,652 · App. 12/360,386 · Granted Jan 8, 2013

Using analog signals to communicate through an A/D converter and USB interface

Assignee: Sony Computer Entertainment Inc.
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Quick Facts
Patent No.
US 8,352,652
App. No.
12/360,386
Granted
Jan 8, 2013
Kind
B2
Abstract

Methods and systems for communicating information through a USB device with A/D converters are presented. Active components which provide analog signals to the A/D converters are switched off to cause spikes in the analog signals/channels. The spikes are digitized by the A/D converters and sent to the host through a USB interface. The active components are switched on and off in a pattern corresponding to a message, such that the host can determine the message from the resulting spikes. If multiple active components and A/D converters are used, then multiple ‘bits’ can be transmitted simultaneously using the different channels.

Claims (31)

1. A method of transmitting a message from a digital-to-analog (D/A) converter configured to provide a first type of communication using an electrical analog signal to an analog-to-digital (A/D) converter electrically connected with the D/A converter, the A/D converter configured to provide digital data to a bus interface, the method comprising:

powering down the D/A converter such that a voltage spike is generated in the analog signal and a digital adaptation of the spike is provided to the bus interface;

powering up the D/A converter to ready the powered active component for a power down; and

repeating the powering down and powering up steps to form a second type of communication according to a predetermined pattern corresponding to a message, the powering down steps generating a series of spikes in the data corresponding to the message.

2. The method of claim 1 wherein the message is determined by a frequency of the spikes.

3. The method of claim 1 wherein the message is determined by durations of the spikes.

4. The method of claim 1 wherein the message is a wakeup message corresponding to a start of a larger transmission.

5. The method of claim 1 wherein the message is header data indicating a duration of a subsequent message.

6. The method of claim 1 wherein the message includes a cyclic redundancy check (CRC).

7. The method of claim 1 wherein the bus interface and A/D converter are on the same integrated circuit.

8. The method of claim 1 further comprising:

powering down a second D/A converter configured to provide a second analog signal to a second A/D converter connected with the second D/A converter, the second A/D converter configured to provide digital data to the bus interface such that a spike is generated in the second analog signal and a second digital adaptation of the spike is provided to the bus interface;

powering up the second D/A converter; and

repeating the powering down the second D/A converter and then powering up the second D/A converter in a second predetermined pattern corresponding to the message, the powering down of the second D/A converter steps generating a second series of spikes in the data corresponding to the message,

wherein both series of spikes are necessary to distinguish the message.

9. The method of claim 8 wherein both series of spikes in the data occur simultaneously.

10. The method of claim 8 wherein the powering down steps of the first and second D/A converter occur simultaneously.

11. A method of transmitting a message through multiple analog-to-digital (A/D) converters to a bus interface using a first communication type, the method comprising powering down m of n digital-to-analog (D/A) converters configured to provide electrical analog signals to n A/D converters electrically connected with the D/A converters, the n A/D converters configured to provide digital data to a bus interface such that one or more voltage spikes are generated in the analog signals and a set of m digital adaptations of the spikes are provided to the bus interface, the set of m digital adaptations of the spikes corresponding to a message using a second communication type, wherein n is an integer greater than or equal to 2 and m is an integer greater than or equal to 1 and less than or equal to n.

12. The method of claim 11 wherein the number of m D/A converters powered down corresponds to the message.

13. The method of claim 11 wherein the particular m D/A converters powered down correspond to the message.

14. The method of claim 11 further comprising powering down k of the n D/A converters such that one or more spikes are generated in the analog signals and a set of k digital adaptations of the spikes are provided to the bus interface, the set of k digital adaptations of the spikes corresponding to the message, wherein both sets of m and k digital adaptations of spikes are necessary to distinguish the message.

15. The method of claim 11 wherein the bus interface and A/D converters are on the same integrated circuit.

16. A system for transmitting a message through an analog-to-digital (A/D) converter to a bus interface, the method comprising:

a bus interface;

an A/D converter configured to provide digital data to the bus interface;

a powered active component configured to provide an electrical analog signal to the A/D converter, the powered active component electrically connected with the A/D converter through at least one signal line and supplied power through at least one non-signal line; and

a circuit configured to perform the steps of powering down the powered active component through the at least one non-signal line such that a voltage spike is generated in the analog signal and a digital adaptation of the spike is provided to the bus interface, powering up the powered active component through the at least one non-signal line, and repeating the powering down and powering up steps in a predetermined pattern corresponding to a message, the powering down steps generating a series of spikes in the digital data, the series corresponding to the message.

17. The system of claim 16 wherein the powered active component includes a Universal Serial Bus (USB)-compatible integrated circuit (IC), wherein the circuit is configured to power down and up the USB-compatible IC.

18. The method of claim 1 wherein the D/A converter includes a Universal Serial Bus (USB)-compatible integrated circuit (IC), wherein the USB-compatible IC is powered up and down.

19. The method of claim 1 wherein the powering down and up of the D/A converter occurs through power supply lines to the D/A converter, and the series of spikes is generated in differential signal lines from the D/A converter.

20. The method of claim 11 wherein the powering down m of n D/A converters occurs through non-signal, power lines to the D/A converters, and the one or more voltage spikes are generated in analog signals that are separate from the non-signal lines.

Assignments (4)
CHANGE OF NAME Recorded Jul 1, 2016
From: SONY COMPUTER ENTERTAINMENT INC.
To: SONY INTERACTIVE ENTERTAINMENT INC.
Reel/Frame 039239/0356 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2011
From: SONY NETWORK ENTERTAINMENT PLATFORM INC.
To: SONY COMPUTER ENTERTAINMENT INC.
Reel/Frame 027557/0001 →
CHANGE OF NAME Recorded Dec 26, 2011
From: SONY COMPUTER ENTERTAINMENT INC.
To: SONY NETWORK ENTERTAINMENT PLATFORM INC.
Reel/Frame 027446/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2009
From: MAO, XIAODONG
To: SONY COMPUTER ENTERTAINMENT INC.
Reel/Frame 022161/0364 →
Continuity (2)
Provisional Application 61143040 · Jan 7, 2009
Related Publication 20100174837A1 · Jul 8, 2010