Host-based messaging framework for PCIe device management

1. A method of routing data in an information handling system, the method comprising:

receiving at a management controller a first data packet bound for a first peripheral component interconnect express input/output (PCIe I/O) device communicating with a primary processor that is associated with a primary chipset;

sending the first data packet from the management controller to the first PCIe I/O device via a management component transfer protocol (MCTP)-over-PCIe protocol;

receiving a notification from the management controller at a basic input/output system (BIOS) that includes a system management interrupt (SMI) handler, the notification indicating that the management controller has sent a second data packet bound for a second PCIe I/O device communicating with a secondary processor that is associated with a secondary chipset;

determining at the BIOS that the second PCIe I/O device is communicating with the secondary processor;

registering the second PCIe I/O device in association with the secondary processor;

assigning a PCIe capability identifier to the second PCIe I/O device at the BIOS;

generating an SMI at the information handling system via the SMI handler in response to the notification;

retrieving the second data packet from the management controller via the SMI handler; and

sending a payload associated with the second data packet from the SMI handler to the second PCIe I/O device, wherein the payload is sent to the second PCIe I/O device via the PCIe capability identifier.

2. The method of claim 1 , wherein the second data packet includes header information indicating that the second data packet is bound for the second PCIe I/O device.

3. The method of claim 1 , wherein the second data packet includes a PCIe vendor-defined messaging packet.

4. The method of claim 1 , wherein sending the payload further comprises copying the payload to a buffer at the second PCIe I/O device.

5. The method of claim 4 , further comprising asserting a control register setting, wherein firmware at the second PCIe I/O device consumes the payload in response to the control register setting.

6. The method of claim 1 , further comprising sending a status message from the BIOS SMI handler to the management controller, the status message indicating that the payload has been delivered to the second PCIe I/O device.

7. A method of sending data in an information handling system, the method comprising:

receiving a data packet at a management controller;

when the data packet includes information indicating that the data packet is bound for a first peripheral component interconnect express input/output (PCIe I/O) device associated with a primary processor associated with a primary chipset, sending the data packet from the management controller to the first PCIe I/O device via a management component transfer protocol (MCTP)-over-PCIe protocol; and

when the data packet includes information indicating that the data packet is bound for a second PCIe I/O device associated with a secondary processor associated with a secondary chipset:

determining at a basic input/output system (BIOS) that the second PCIe I/O device is communicating with the secondary processor;

registering the second PCIe I/O device in association with the secondary processor;

assigning a PCIe capability identifier to the second PCIe I/O device at the BIOS;

sending a notification to a BIOS system management interrupt (SMI) handler, the notification indicating that the BIOS SMI handler is to generate a SMI at the information handling system;

sending the data packet to the BIOS SMI handler; and

receiving a status message from the BIOS SMI handler indicating that a payload associated with the data packet has been sent to the second PCIe I/O device.

8. The method of claim 7 , wherein the management controller toggles an event at the BIOS and wherein the SMI is generated in response to the event being toggled.

9. The method of claim 7 , wherein, in further response to the data packet including information indicating that the data packet is bound for the second PCIe I/O device, sending the data packet to a buffer at the second PCIe I/O device.

10. A method of sending data in an information handling system, the method comprising:

detecting a first event at a primary processor associated with a primary chipset, the first event indicating that a first peripheral component interconnect express input/output (PCIe I/O) device has a first vendor-defined messaging (VDM) packet for a management controller of the information handling system;

sending the first VDM packet to the management controller via a management component transfer protocol (MCTP)-over-PCIe protocol;

detecting a second event at a secondary processor associated with a secondary chipset, the second event indicating that a basic input/output system (BIOS) system management interrupt (SMI) handler is to generate a SMI;

querying a second PCIe I/O device associated with the secondary processor to determine a presence of a second VDM packet at the second PCIe I/O device that is communicating with the secondary processor, wherein the second PCIe I/O device is assigned a PCIe capability identifier at the BIOS;

retrieving the second VDM packet from the second PCIe I/O device via the PCIe capability identifier; and

delivering a payload associated with the second VDM packet from the BIOS SMI handler to the management controller.

11. The method of claim 10 , wherein the second PCIe I/O device generates the second event at the processor in response to uploading the second VDM packet from a source.

12. The method of claim 10 , further comprising sending a status message from the BIOS SMI handler to the second PCIe I/O device, the status message indicating that the payload has been delivered to the management controller.

13. The method of claim 10 , wherein the second event at the second processor comprises a PCIe advanced error reporting event.

14. The method of claim 10 , wherein the second PCIe I/O device comprises a redundant array of independent disks (RAID) controller.

15. A non-transitory computer-readable medium including processor-readable instructions executable by a processor to perform a method, the method comprising:

receiving at a management controller a first data packet bound for a first peripheral component interconnect express input/output (PCIe I/O) device communicating with a primary processor associated with a primary chipset;

sending the first data packet from the management controller to the first PCIe I/O device via a management component transfer protocol (MCTP)-over-PCIe protocol;

receiving a notification from the management controller at a basic input/output system (BIOS) system management interrupt (SMI) handler, the notification indicating that the management controller has a second data packet bound for a second PCIe I/O device coupled to a secondary processor associated with a secondary chipset;

determining at the BIOS that the second PCIe I/O device is communicating with the secondary processor;

registering the second PCIe I/O device in association with the secondary processor;

assigning a PCIe capability identifier to the second PCIe I/O device at the BIOS;

generating an SMI at the information handling system via the BIOS SMI handler in response to the notification;

retrieving the second data packet from the management controller via the BIOS SMI handler; and

sending a payload associated with the second data packet from the BIOS SMI handler to the second PCIe I/O device, wherein the payload is sent to the second PCIe I/O device via the PCIe capability identifier.

16. The non-transitory computer-readable medium of claim 15 , wherein the method further comprises:

detecting an event at the secondary processor, the event indicating that the BIOS SMI handler is to generate a SMI;

querying the second PCIe I/O device to determine a presence of a vendor-defined messaging (VDM) packet at the second PCIe I/O device;

retrieving the VDM packet from the second PCIe I/O device; and

delivering a payload associated with the second VDM packet from the BIOS SMI handler to the management controller.

17. The non-transitory computer readable medium of claim 15 , wherein sending the payload further comprises sending the payload to a buffer at the second PCIe I/O device.