Apparatus and method for updating set of limited access model specific registers in a microprocessor
A microprocessor having model specific registers (MSRs) includes, for each of the MSRs, an associated default value that indicates whether the MSR is protected or non-protected and an associated fuse that, if blown, toggles the associated default value from protected to non-protected or non-protected to protected. In one embodiment, microcode that does the following in response to the microprocessor encountering an instruction that accesses a specified MSR: determines whether the fuse associated with the specified MSR is blown or unblown, uses the default value associated with the MSR as an indicator of whether the MSR is protected if the associated fuse is unblown; toggles the associated default value to generate the indicator if the associated fuse is blown; protects access to the MSR if the indicator indicates the MSR is protected; and refrains from protecting access to the MSR if the indicator indicates the MSR is non-protected.
1. A microprocessor having model specific registers (MSRs), the microprocessor comprising:
for each of the MSRs, an associated default value that indicates whether the MSR is protected or non-protected; and
for each of the MSRs, an associated fuse that, if blown, toggles the associated default value from protected to non-protected or non-protected to protected, wherein the associated fuse, if blown to toggle the default protection value associated with the MSR, is blown during manufacturing of the microprocessor.
2. The microprocessor of claim 1 , further comprising:
microcode, configured to perform the following in response to the microprocessor encountering an instruction that accesses a specified MSR of the MSRs:
determine whether the fuse associated with the specified MSR is blown or unblown;
use the default value associated with the specified MSR as an indicator of whether the specified MSR is protected if the fuse associated with the specified MSR is unblown;
toggle the default value associated with the MSR to generate the indicator if the fuse associated with the specified MSR is blown;
protect access to the specified MSR if the indicator indicates the specified MSR is protected; and
refrain from protecting access to the specified MSR if the indicator indicates the specified MSR is non-protected.
3. The microprocessor of claim 2 , wherein in order to protect access to the specified MSR if the indicator indicates the specified MSR is protected, the microcode prohibits access by the instruction to the specified MSR unless a program that includes the instruction provides a correct password to the microprocessor.
4. The microprocessor of claim 3 , further comprising:
an encryption engine, configured to generate a password;
wherein the microcode is configured to compare the password generated by the encryption engine with the password provided by the program in order to determine whether the program provided the correct password.
5. The microprocessor of claim 4 , further comprising:
a key value, wherein the encryption engine is configured to generate the password using the key value.
6. The microprocessor of claim 5 , wherein the key value is non-visible to the program.
7. The microprocessor of claim 1 , wherein the default values that indicate whether the associated MSR is protected or non-protected are specified within microcode of the microprocessor.
8. The microprocessor of claim 1 , wherein some of the MSRs are non-architectural MSRs of the microprocessor.
9. The microprocessor of claim 1 , wherein the fuses and the default values are fabricated into the microprocessor.
10. The microprocessor of claim 1 , wherein the fuses are configured to be blown subsequent to fabrication of the microprocessor.
11. A method for protecting access to model specific registers (MSRs) within a microprocessor, the method comprising:
fabricating the microprocessor to include, for each of the MSRs, an associated default value that indicates whether the MSR is protected or non-protected;
fabricating the microprocessor to include, for each of the MSRs, an associated fuse that, if blown, toggles the associated default value from protected to non-protected or non-protected to protected; and
blowing one or more of the fuses subsequent to said fabricating the microprocessor to include, for each of the MSRs, the associated default value and the associated fuse, wherein said blowing is performed during manufacturing of the microprocessor.
12. The method of claim 11 , further comprising:
in response to encountering an instruction that accesses a specified MSR of the MSRs:
determining whether the fuse associated with the specified MSR is blown or unblown;
using the default value associated with the specified MSR as an indicator of whether the specified MSR is protected if the fuse associated with the specified MSR is unblown;
toggling the default value associated with the MSR to generate the indicator if the fuse associated with the specified MSR is blown;
protecting access to the specified MSR if the indicator indicates the specified MSR is protected; and
refraining from protecting access to the specified MSR if the indicator indicates the specified MSR is non-protected.
13. The method of claim 11 , wherein the default values that indicate whether the associated MSR is protected or non-protected are specified within microcode of the microprocessor.
14. A method for protecting access to model specific registers (MSRs) within a microprocessor, the method comprising:
encountering an instruction that accesses a specified MSR of the MSRs;
determining whether a fuse associated with the specified MSR is blown or unblown;
using a default value associated with the specified MSR as an indicator of whether the specified MSR is protected if the fuse associated with the specified MSR is unblown;
toggling the default value associated with the MSR to generate the indicator if the fuse associated with the specified MSR is blown, wherein the associated fuse, if blown to toggle the default protection value associated with the MSR, is blown during manufacturing of the microprocessor;
protecting access to the specified MSR if the indicator indicates the specified MSR is protected; and
refraining from protecting access to the specified MSR if the indicator indicates the specified MSR is non-protected.
15. The method of claim 14 , wherein said protecting access to the specified MSR if the indicator indicates the specified MSR is protected comprises prohibiting access by the instruction to the specified MSR unless a program that includes the instruction provides a correct password to the microprocessor.
16. The method of claim 15 , further comprising:
generating a password, wherein said generating is performed by an encryption engine of the microprocessor; and
comparing the password generated by the encryption engine with the password provided by the program in order to determine whether the program provided the correct password.
17. The method of claim 16 , wherein the encryption engine generates the password using a key value.
18. The method of claim 17 , wherein the key value is non-visible to the program.
19. The method of claim 14 , wherein the default values that indicate whether the associated MSR is protected or non-protected are specified within the microcode of the microprocessor.
20. A computer program product for use with a computing device, the computer program product comprising:
a non-transitory computer usable storage medium, having computer readable program code embodied in said medium, for specifying a microprocessor having model specific registers (MSRs), the computer readable program code comprising:
first program code for specifying for each of the MSRs, an associated default value that indicates whether the MSR is protected or non-protected; and
second program code for specifying for each of the MSRs, an associated fuse that, if blown, toggles the associated default value from protected to non-protected or non-protected to protected, wherein the associated fuse, if blown to toggle the default protection value associated with the MSR, is blown during manufacturing of the microprocessor.
21. The computer program product of claim 20 , further comprising:
third program code for specifying microcode, configured to perform the following in response to the microprocessor encountering an instruction that accesses a specified MSR of the MSRs:
determine whether the fuse associated with the specified MSR is blown or unblown;
use the default value associated with the specified MSR as an indicator of whether the specified MSR is protected if the fuse associated with the specified MSR is unblown;
toggle the default value associated with the MSR to generate the indicator if the fuse associated with the specified MSR is blown;
protect access to the specified MSR if the indicator indicates the specified MSR is protected; and
refrain from protecting access to the specified MSR if the indicator indicates the specified MSR is non-protected.
22. The computer program product of claim 21 , wherein in order to protect access to the specified MSR if the indicator indicates the specified MSR is protected, the microcode prohibits access by the instruction to the specified MSR unless a program that includes the instruction provides a correct password to the microprocessor.
23. The computer program product of claim 22 , further comprising:
fourth program code for specifying an encryption engine, configured to generate a password;
wherein the microcode is configured to compare the password generated by the encryption engine with the password provided by the program in order to determine whether the program provided the correct password.
24. The computer program product of claim 23 , further comprising:
fifth program code for specifying a key value, wherein the encryption engine is configured to generate the password using the key value.
25. The computer program product of claim 24 , wherein the key value is non-visible to the program.
26. The computer program product of claim 20 , wherein the default values that indicate whether the associated MSR is protected or non-protected are specified within microcode of the microprocessor.
27. The computer program product of claim 20 , wherein some of the MSRs are non-architectural MSRs of the microprocessor.
28. The computer program product of claim 20 , wherein the fuses and the default values are fabricated into the microprocessor.
29. The computer program product of claim 20 , wherein the fuses are configured to be blown subsequent to fabrication of the microprocessor.