IP Library Granted Patent US 8,462,003
Granted Patent B2
US 8,462,003 · App. 12/886,672 · Granted Jun 11, 2013

Transmitting and receiving digital and analog signals across an isolator

Inventors: Gek Yong Ng (Singapore, SG); Richard Kok Keong Lum (Singapore, SG)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,462,003
App. No.
12/886,672
Granted
Jun 11, 2013
Kind
B2
Abstract

Various embodiments of systems for transmitting and receiving digital and analog signals across a single isolator, solid state lighting systems, and DC/DC converter feedback regulation control systems are disclosed. At least some of the circuits, systems and methods disclosed herein may be implemented using conventional CMOS design and manufacturing techniques and processes to provide, for example, a single integrated circuit or ASIC.

Claims (61)

1. A system for transmitting and receiving digital and analog signals across an isolator, comprising:

a modulator;

a transmitter operably connected to the modulator;

a signal isolator operably connected to the modulator;

a receiver operably connected to the isolator;

a frequency discriminator operably connected to the receiver, and

a filtering circuit operably connected to the receiver;

wherein the modulator is configured to accept as inputs thereto an analog signal and a first digital signal having a first frequency, and the modulator is further configured to modulate the analog signal according to the first frequency and corresponding logic state of the first digital signal to form a frequency-modulated (FM) signal as an output therefrom to the transmitter, the transmitter being configured to encode and transmit the FM signal to the isolator for conveyance thereacross to the receiver as an input thereto, the receiver providing the received FM signal to the frequency discriminator and the filtering circuit, the frequency discriminator being configured to decode the FM signal and provide a reconstructed first digital signal as an output therefrom, the filtering circuit being configured to filter the FM signal and provide the analog signal as an output therefrom.

2. The system of claim 1 , wherein the first digital input signal is a first fault signal.

3. The system of claim 1 , wherein a second digital signal has a second frequency, and the modulator is further configured to modulate the analog signal according to: (a) the first frequency and corresponding logic state of the first digital signal, and (b) the second frequency and corresponding logic state of the second digital signal, to form the frequency-modulated (FM) signal.

4. The system of claim 3 , wherein the frequency discriminator is further configured to decode the FM signal and provide a reconstructed second digital signal.

5. The system of claim 3 , wherein the second digital input signal is a second fault signal.

6. The system of claim 1 or claim 3 , wherein the filtering circuit comprises a bandpass filtering circuit.

7. The system of claim 6 , wherein the passband of the bandpass filtering circuit does not include the first or second frequencies.

8. The system of claim 1 , wherein the isolator is one of a capacitive isolator, an optical isolator, and a magnetic isolator.

9. The system of claim 1 , wherein the modulator further comprises a triangle wave generator circuit configured to generate and provide as outputs therefrom at least first and second triangle wave signals having the first and second frequencies, respectively.

10. The system of claim 9 , wherein the modulator further comprises a comparator having as inputs thereto the triangle wave signals and the analog signal.

11. The system of claim 9 , wherein the triangle wave generator circuit is further configured to accept as an input thereto the first digital signal, the first digital signal being a control signal configured to determine whether the output of the triangle wave generator circuit is a triangle signal having the first frequency or the second frequency.

12. The system of claim 1 , wherein the filtering circuit further comprises a charge pump circuit having switches that open and close according to the frequency of the received FM signal.

13. The system of claim 1 , wherein the filtering circuit further comprises a charge pump circuit configured to provide current that varies in accordance with the frequency of the FM signal received thereby.

14. A solid state lighting system, comprising:

an AC/DC rectification circuit operably connectable to a source of AC voltage as an input thereto, and configured to provide a rectified DC output voltage;

an isolation transformer comprising a switched mode power supply (SMPS) controller, the transformer being configured to receive the rectified DC output voltage as an input thereto and to provide an isolated DC output voltage therefrom;

a lighting circuit comprising at least first and second pluralities of LEDs connected in series and driven by the isolated DC output voltage, a current sensing circuit being operably connected to a current sensing node in the lighting circuit and configured to provide a sensed current signal as an output therefrom;

a voltage sensing circuit arranged in parallel with respect to the lighting circuit and comprising a voltage sensing node disposed between first and second resistors of a voltage dividing network, the voltage monitoring circuit being configured to provide a voltage monitoring signal as an output therefrom through the voltage sensing node;

a first comparator configured to receive as inputs thereto the voltage monitoring signal and a first reference voltage, the first comparator being configured to generate a fault state output signal when the voltage monitoring signal exceeds or falls below a predetermined threshold;

a triangle wave generator circuit having as an input thereto the output signal of the first comparator, the triangle wave generator being configured to generate a triangle wave output signal having a first frequency when an output signal corresponding to the fault state is not received thereby, and a triangle wave signal having a second frequency when the fault state output signal is received thereby;

a second comparator configured to receive as inputs thereto the triangle wave output signal and the sensed current signal, the second comparator being configured to generate a modulated output signal comprising the sensed current signal and the triangle wave output signal, and

an optical isolator circuit configured to receive as an input thereto the modulated output signal, the isolator comprising an LED driver operably connected to the output of second comparator, the LED driver providing optical output signals, the isolator further comprising a photodetector configured to generate current in response to the LED driver providing the optical output signals thereto.

15. The system of claim 14 , further comprising a transimpedance amplifier configured to receive the current from the photodetector and generate a voltage signal at an output thereof.

16. The system of claim 14 , wherein the second comparator is further configured to generate at the output thereof a first pulse-width-modulated (PWM) output signal having a first frequency representative of the sensed current and a second PWM output signal having a second frequency representative of the fault state.

17. The system of claim 14 , further comprising a third comparator having as inputs thereto the output voltage signal generated by the transimpedance amplifier and a second reference voltage, the third comparator being configured to generate a charge pump circuit control signal.

18. The system of claim 17 , wherein the third comparator further provides a complementary charge pump circuit control signal as an output therefrom.

19. The system of claim 17 , wherein the charge pump circuit control signal is provided as an input to a charge pump circuit configured to provide as an output therefrom a reconstructed current sensing signal.

20. The system of claim 19 , wherein the reconstructed current sensing signal is provided by the charge pump circuit to the SMPS controller by a linear feedback line.

21. The system of claim 19 , wherein the SMPS controller is configured to change the isolated DC output voltage corresponding thereto in accordance with variations in the reconstructed current sensing signal.

22. The solid state lighting system of claim 17 , wherein the third comparator is further configured to generate a frequency detection signal.

23. The solid state lighting system of claim 22 , wherein the frequency detection signal is provided as an input to a frequency detection circuit.

24. The system of claim 23 , wherein the reconstructed fault state output signal is provided by the frequency detection circuit to the SMPS controller by a digital fault signal line.

25. The system of claim 24 , wherein the SMPS controller is configured to shut the isolation transformer down in response to receiving the fault state output signal.

26. A DC/DC converter feedback regulation control system, comprising:

A DC/DC converter configured to receive a first DC input voltage and to provide a regulated second DC output voltage;

an isolation transformer comprising a switched mode power supply (SMPS) controller, the transformer being configured to receive the second DC voltage as an input thereto and to provide an isolated DC output voltage therefrom;

a load circuit driven by the isolated DC output voltage, a current fault generation circuit being operably connected to a current sensing node in the load circuit and configured to provide a current fault signal as an output therefrom through the current sensing node when the sensed current falls below or exceeds a first predetermined threshold;

a voltage sensing circuit arranged in parallel with respect to the load circuit and comprising voltage sensing and feedback nodes disposed between first and second resistors of a voltage dividing network, the voltage monitoring circuit being configured to provide voltage monitoring and feedback signals as outputs therefrom through the voltage sensing and feedback nodes, respectively;

a first comparator configured to receive as inputs thereto the voltage monitoring signal and a first reference voltage, the first comparator being configured to generate a voltage fault state output signal when the voltage monitoring signal exceeds a predetermined threshold;

a triangle wave generator circuit having as inputs thereto the output signal of the first comparator and the current sensing node, the triangle wave generator being configured to generate a triangle wave output signal having a first frequency when an output signal corresponding to no voltage or current fault state is received thereby, a triangle wave signal having a second frequency when the voltage fault state output signal is received thereby, and a triangle wave signal having a third frequency when the current fault state output signal is received thereby;

a second comparator configured to receive as inputs thereto the triangle wave output signal and the voltage feedback signal, the second comparator being configured to generate a modulated output signal comprising the triangle wave output signal and the voltage feedback signal, and

an optical isolator circuit configured to receive as an input thereto the modulated output signal, the isolator comprising an LED driver operably connected to the output of second comparator, the LED driver providing optical output signals, the isolator further comprising a photodetector configured to generate current in response to the LED driver providing the optical output signals thereto.

27. The system of claim 26 , wherein the current fault generation circuit is configured to detect an over current load condition in a gate driving circuit.

28. The system of claim 26 , further comprising a transimpedance amplifier configured to receive the current from the photodetector and generate a voltage signal at an output thereof.

29. The system of claim 26 , further comprising a third comparator having as inputs thereto the output voltage signal generated by the transimpedance amplifier and a second reference voltage, the third comparator being configured to generate a charge pump circuit control signal.

30. The system of claim 29 , wherein the third comparator further provides a complementary charge pump circuit control signal as an output therefrom.

31. The system of claim 29 , further comprising a charge pump circuit configured to receive the charge pump circuit control signal and provide as an output therefrom a reconstructed voltage feedback signal.

32. The system of claim 31 , wherein the reconstructed voltage feedback signal is provided by the charge pump circuit to the SMPS controller by a linear feedback line.

33. The system of claim 32 , wherein the third comparator is further configured to generate a frequency detection signal.

34. The system of claim 32 , wherein the frequency detection signal is provided as an input to a frequency detection circuit.

35. The system of claim 34 , wherein the reconstructed voltage fault state output signal is provided by the frequency detection circuit to the SMPS controller by a first digital fault signal line.

36. The system of claim 34 , wherein the reconstructed current fault state output signal is provided by the frequency detection circuit to the SMPS controller by a second digital fault signal line.

37. The system of claim 33 , wherein the SMPS controller is configured to shut the isolation transformer down in response to receiving the current fault state output signal or the voltage fault state output signal.

38. The system of claim 33 , wherein the SMPS controller is configured to change the isolated DC output voltage corresponding thereto in accordance with variations in the reconstructed voltage feedback signal.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded Mar 27, 2013
From: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030101/0867 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2010
From: NG, GEK YONG; LUM, RICHARD KOK KEONG
To: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
Reel/Frame 025019/0473 →
Continuity (1)
Related Publication 20120068614A1 · Mar 22, 2012