Trench MOSFET and method for fabricating same
View Patent ↗According to an exemplary embodiment, a trench field-effect transistor (trench FET) includes a trench formed in a semiconductor substrate, the trench including a gate dielectric disposed therein. A source region is disposed adjacent the trench. The trench FET also has a gate electrode including a lower portion disposed in the trench and a proud portion extending laterally over the source region. A silicide source contact can extend vertically along a sidewall of the source region. Also, a portion of the gate dielectric can extend laterally over the semiconductor substrate. The trench FET can further include a silicide gate contact formed over the proud portion of the gate electrode.
1. A trench field-effect transistor (trench FET) comprising:
a trench formed in a semiconductor substrate, said trench including a gate dielectric disposed therein;
a source region disposed adjacent said trench;
a gate electrode including a lower portion disposed in said trench and a proud portion extending laterally over said source region; and
a dielectric cap over said gate electrode, said dielectric cap extending laterally beyond an outer sidewall of said source region opposite said gate electrode.
2. The trench FET of claim 1 further comprising a silicide gate contact formed over said proud portion of said gate electrode.
3. The trench FET of claim 1 , wherein a portion of said gate dielectric extends laterally over said semiconductor substrate.
4. The trench FET of claim 1 further comprising dielectric spacers formed adjacent respective sidewalls of said proud portion of said gate electrode.
5. The trench FET of claim 1 , wherein said dielectric cap extends vertically along said outer sidewall of said source region.
6. The trench FET of claim 1 , wherein a silicide source contact extends vertically along said outer sidewall of said source region.
7. The trench FET of claim 6 further comprising a channel region disposed adjacent said trench below said source region.
8. The trench FET of claim 7 , wherein said silicide source contact extends laterally over said channel region.
9. A method for fabricating a trench field-effect transistor (trench FET) comprising:
forming a trench in a semiconductor substrate, said trench including a gate dielectric disposed therein;
forming a source region disposed adjacent said trench;
forming a gate electrode including a lower portion disposed in said trench and a proud portion extending laterally over said source region; and
forming a dielectric cap over said gate electrode, said dielectric cap extending laterally beyond an outer sidewall of said source region opposite said gate electrode.
10. The method of claim 9 further comprising forming a silicide gate contact over said proud portion of said gate electrode.
11. The method of claim 9 , wherein a portion of said gate dielectric extends laterally over said semiconductor substrate.
12. The method of claim 9 further comprising forming dielectric spacers adjacent respective sidewalls of said proud portion of said gate electrode.
13. The method of claim 9 , wherein said dielectric cap extends vertically along said outer sidewall of said source region.
14. The method of claim 9 further comprising forming a silicide source contact extending vertically along said outer sidewall of said source region.
15. The method of claim 14 , wherein a channel region is disposed adjacent said trench below said source region.
16. The method of claim 15 , wherein said silicide source contact extends laterally over said channel region.
17. A trench field-effect transistor (trench FET) comprising:
a trench formed in a semiconductor substrate, said trench including a gate dielectric disposed therein;
a source region disposed adjacent said trench;
a gate electrode including a lower portion disposed in said trench and a proud portion extending above said source region, a silicide gate contact formed on said gate electrode; and
a dielectric cap over said gate electrode, said dielectric cap extending laterally beyond an outer sidewall of said source region opposite said gate electrode.
18. The trench FET of claim 17 , wherein said proud portion extends laterally over said source region.
19. The trench FET of claim 18 , wherein a portion of said gate dielectric extends laterally over said semiconductor substrate.
20. The trench FET of claim 17 further comprising dielectric spacers formed adjacent respective sidewalls of said proud portion of said gate electrode.