IP Library Granted Patent US 8,592,839
Granted Patent B2
US 8,592,839 · App. 12/926,854 · Granted Nov 26, 2013

Vertical light-emitting devices having patterned emitting unit and methods of manufacturing the same

Inventors: Hyung-su Jeong (Suwon-si, KR); Young-soo Park (Yongin-si, KR); Su-hee Chae (Suwon-si, KR); Bok-ki Min (Suwon-si, KR); Jun-youn Kim (Hwaseong-si, KR); Hyun-gi Hong (Suwon-si, KR); Young-jo Tak (Hwaseong-si, KR); Jae-won Lee (Yongin-si, KR)
Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,592,839
App. No.
12/926,854
Granted
Nov 26, 2013
Kind
B2
Abstract

Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.

Claims (19)

1. A vertical light-emitting device comprising:

a semiconductor layer including an active layer configured to emit light;

a first electrode on a top of the semiconductor layer;

a second electrode on a bottom of the semiconductor layer; and

a transparent electrode on the semiconductor layer, wherein

the semiconductor layer is a pattern array formed of a plurality of stacks,

a space between the plurality of stacks is filled with an insulating layer, and

the transparent electrode covers the semiconductor layer and the insulating layer such that a contiguous portion of the transparent electrode extends over an entire width of multiple stacks in the plurality of stacks and an entire width of multiple spaces filled with the insulating layer, wherein

the transparent electrode is between the first electrode and the insulating layer,

the insulating layer has a grid pattern,

the first electrode is on the insulating layer and has the grid pattern, and

the first electrode is substantially aligned with the insulating layer.

2. The light-emitting device of claim 1 , further comprising a silicon substrate on a bottom of the second electrode.

3. The light-emitting device of claim 2 , wherein a bonding metal layer is between the second electrode and the silicon substrate.

4. The light-emitting device of claim 1 , wherein a width of the first electrode is smaller than or equal to a width of the multiple spaces filled with the insulating layer.

5. The light-emitting device of claim 1 , wherein a width of the first electrode is larger than a width of the multiple spaces filled with the insulating layer such that the first electrode on the insulating layer contacts the semiconductor layer.

6. The light-emitting device of claim 1 , further comprising:

a conductive buffer layer on the bottom of the semiconductor layer, wherein the second electrode is a conductive silicon substrate contacting the conductive buffer layer and having the insulating layer thereon.

7. The light-emitting device of claim 6 , wherein the silicon substrate has a plurality of protrusions corresponding to the plurality of the stacks, and the conductive buffer layer and the semiconductor layer are sequentially stacked on the plurality of protrusions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2010
From: JEONG, HYUNG-SU; PARK, YOUNG-SOO; CHAE, SU-HEE; MIN, BOK-KI; KIM, JUN-YOUN; HONG, HYUN-GI; TAK, YOUNG-JO; LEE, JAE-WON
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 025615/0089 →
Priority Claims (1)
KR 10-2010-0042589 · May 6, 2010 · national
Continuity (1)
Related Publication 20110272712A1 · Nov 10, 2011