System and method for testing a radio frequency integrated circuit
In an embodiment, a method of testing a radio frequency integrated circuit (RFIC) includes generating high frequency test signals using the on-chip test circuit, measuring signal levels using on-chip power detectors, and controlling and monitoring the on-chip test circuit using low frequency signals. The RFIC circuit is configured to operate at high frequencies, and an on-chip test circuit that includes frequency generation circuitry configured to operate during test modes.
1. An integrated circuit comprising:
a radio frequency (RF) circuit comprising:
an external high-frequency interface configured to operate within a first frequency band, the external high-frequency interface coupled to an output pad of the integrated circuit, and
a first switchable internal high-frequency interface configured to operate within the first frequency band; and
a test circuit comprising:
a variable frequency oscillator coupled to a switch, the switch coupled to the first switchable internal high-frequency interface, and
an external low-frequency interface configured to operate within a second frequency band, the second frequency band comprising frequencies lower than the first frequency band.
2. The integrated circuit of claim 1 , wherein the external low-frequency interface is configured to be coupled to a low-frequency tester.
3. The integrated circuit of claim 1 , wherein:
the first frequency band comprises frequency band comprises frequencies greater than 10 GHz; and
the second frequency band comprises frequencies less than 1 MHz.
4. The integrated circuit of claim 1 , wherein the test circuit further comprises:
a variable gain amplifier (VGA) having an input coupled to the variable frequency oscillator and an output coupled to the switch;
a first power sensor having an input coupled to an output of the VGA, and an output coupled to the low-frequency external interface;
a mixer having a first input coupled to the variable frequency oscillator, and an output coupled to a second high-frequency interface of the RF circuit; and
a second power sensor comprising an input coupled to the output of the mixer and an output coupled to the low-frequency external interface.
5. The integrated circuit of claim 4 , wherein the test circuit further comprises a temperature sensor coupled to the external low-frequency interface.
6. The integrated circuit of claim 4 , wherein the mixer further comprises a second input coupled to the external low frequency interface.
7. The integrated circuit of claim 4 , wherein the first power sensor and the second power sensor are coupled to the external low-frequency interface via an analog multiplexer.
8. The integrated circuit of claim 4 , where the RF circuit comprises a local oscillator (LO) input coupled to the switchable internal high-frequency interface.
9. The integrated circuit of claim 4 , wherein the RF circuit comprises a receiver coupled to the output of the mixer via a directional coupler.
10. The integrated circuit of claim 1 , further wherein the test circuit further comprises a digital to analog converter (DAC) coupled to a frequency control input of the variable frequency oscillator, and a frequency divider coupled between the variable frequency oscillator and the external low-frequency input.
11. A semiconductor circuit comprising:
an RF circuit comprising
a receiver comprising a local oscillator (LO) input, and
an RF input coupled to an external pin of the semiconductor circuit; and
a test circuit comprising
an oscillator,
a variable gain amplifier (VGA) coupled to an output of the oscillator,
a switch coupled between an output of the VGA and the local oscillator input of the receiver, wherein the output of the VGA is coupled to the receiver during a test mode, and a system LO is coupled to the receiver during a normal operation mode,
a first power sensor comprising an input coupled to the output of the VGA and an output coupled to a low-frequency external interface of the test circuit,
a mixer comprising
a first input coupled to the oscillator,
a second input coupled to the external low-frequency interface, and
an output coupled to the receiver input via a coupler, and
a second power sensor comprising an input coupled to the output of the mixer and an output coupled to the low-frequency external interface.
12. The semiconductor circuit of claim 11 , wherein the test circuit further comprises:
a divider having an input coupled to the output of the oscillator and an output coupled to the low-frequency external interface; and
an analog multiplexer having a first input coupled to a temperature sensor, a second input coupled to the output of the first power sensor, a third input coupled to the second power sensor, and an output coupled to the low-frequency external interface.
13. The semiconductor circuit of claim 12 , wherein
the receiver comprises a plurality of receivers;
the coupler comprises a plurality of couplers coupled between the output of the mixer and RF input of each of the receivers;
a first power splitter coupled between the switch and LO inputs of the plurality of receivers; and
a second power splitter coupled between the output of the mixer and the plurality of couplers.
14. The semiconductor circuit of claim 12 , wherein the RF circuit operates at frequencies greater than 10 GHz the low-frequency external interface operates at frequencies lower than 1 MHz.