IP Library Granted Patent US 8,704,363
Granted Patent B2
US 8,704,363 · App. 12/910,229 · Granted Apr 22, 2014

Interface plate between integrated circuits

Inventors: Yacine Felk (Grenoble, FR); Alexis Farcy (La Ravoire, FR)
Assignee: STMicroelectronics S.A.
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Quick Facts
Patent No.
US 8,704,363
App. No.
12/910,229
Granted
Apr 22, 2014
Kind
B2
Abstract

An interface plate capable of being mounted between first and second surface-mounted electronic chips. The plate includes a plurality of first, second, and third through openings, the first openings being filled with a conductive material and being arranged to be in front of pads of the first and second chips during the assembly, the second openings being filled with a second material, the third openings being filled with a third material, the second and third materials forming two complementary components of a thermoelectric couple.

Claims (13)

1. An interface plate capable of being mounted between first and second surface-mounted electronic chips, the plate comprising a plurality of first, second, and third through openings, the first openings being filled with a conductive material and being arranged to be in front of pads of the first and second chips during the assembly, the second openings being filled with a second material, the third openings being filled with a third material, wherein the second and third materials are not identical to each other, forming two complementary components of a thermoelectric couple.

2. The plate of claim 1 , wherein the second or the third material is identical to the conductive material.

3. The plate of claim 1 , wherein the second and the third material belong to the group comprising silicon, germanium, copper, tungsten, and aluminum.

4. The plate of claim 1 , comprising at least one set of first thermoelectric couples cooperating with the first chip, the first couples being series-connected.

5. The plate of claim 4 , wherein the serially connected couples are connected between connection terminals for connection to a microbattery or a buffer capacitor.

6. The plate of claim 4 , comprising at least a second set of second thermoelectric couples cooperating with the second chip, where the second couples are series-connected to one another and are not series-connected with the first couples.

7. The plate of claim 1 , made of silicon.

8. The plate of claim 7 , wherein the silicon has a resistivity greater than 500 ohms·cm.

9. The plate of claim 8 , wherein the silicon has a resistivity greater than 1000 ohms·cm.

10. An electronic device comprising:

a first surface-mounted electronic chip,

a second surface-mounted electronic chip,

an interface plate according to claim 1 , on either side of which the first and second chips are mounted.

Assignments (3)
CHANGE OF NAME Recorded Jan 21, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066357/0693 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE COUNTRY PREVIOUSLY RECORDED ON REEL 025469 FRAME 0176. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNEE COUNTRY WAS INCORRECTLY LISTED ON THE COVER SHEET AS MASSACHUSETTS INSTEAD OF FRANCE. Recorded Feb 26, 2014
From: FELK, YACINE; FARCY, ALEXIS
To: STMICROELECTRONICS S.A.
Reel/Frame 032360/0490 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2010
From: FELK, YACINE; FARCY, ALEXIS
To: STMICROELECTRONICS S.A.
Reel/Frame 025469/0176 →
Priority Claims (1)
FR 09 57445 · Oct 23, 2009 · national
Continuity (1)
Related Publication 20110095437A1 · Apr 28, 2011