Semiconductor device
View Patent ↗An SGT-based static memory cell which is a six-transistor SRAM cell includes an SGT driver transistor including a first gate electrode surrounding a first gate insulating film and composed of at least a metal; an SGT selection transistor including a second gate electrode surrounding a second gate insulating film and composed of at least a metal; an SGT load transistor including a third gate electrode surrounding a third gate insulating film and composed of at least a metal; and a gate wire connected to the second gate electrode. An island-shaped semiconductor layer of the driver transistor has a peripheral length that is less than twice that of an island-shaped semiconductor layer of the selection transistor. A voltage applied to the second gate electrode is lower than a voltage applied to a first-conductivity-type high-concentration semiconductor layer on the upper part of the island-shaped semiconductor layer of the selection transistor.
1. A semiconductor device forming at least part of a six-transistor SRAM cell, comprising:
a first driver transistor including
a first island-shaped semiconductor layer,
a first first-conductivity-type high-concentration semiconductor layer formed on the upper part of the first island-shaped semiconductor layer,
a second first-conductivity-type high-concentration semiconductor layer formed on the lower part of the first island-shaped semiconductor layer,
a first second-conductivity-type semiconductor layer formed between the first first-conductivity-type high-concentration semiconductor layer and the second first-conductivity-type high-concentration semiconductor layer,
a first gate insulating film formed surrounding the first second-conductivity-type semiconductor layer, and
a first gate electrode formed surrounding the first gate insulating film and composed of at least a metal;
a first selection transistor including
a second island-shaped semiconductor layer,
a third first-conductivity-type high-concentration semiconductor layer formed on the upper part of the second island-shaped semiconductor layer,
a fourth first-conductivity-type high-concentration semiconductor layer formed on the lower part of the second island-shaped semiconductor layer,
a second second-conductivity-type semiconductor layer formed between the third first-conductivity-type high-concentration semiconductor layer and the fourth first-conductivity-type high-concentration semiconductor layer,
a second gate insulating film formed surrounding the second second-conductivity-type semiconductor layer, and
a second gate electrode formed surrounding the second gate insulating film and composed of at least a metal;
a first load transistor including
a third island-shaped semiconductor layer,
a third second-conductivity-type high-concentration semiconductor layer formed on the upper part of the third island-shaped semiconductor layer,
a fourth second-conductivity-type high-concentration semiconductor layer formed on the lower part of the third island-shaped semiconductor layer,
a fifth first-conductivity-type semiconductor layer formed between the third second-conductivity-type high-concentration semiconductor layer and the fourth second-conductivity-type high-concentration semiconductor layer,
a third gate insulating film formed surrounding the fifth first-conductivity-type semiconductor layer, and
a third gate electrode formed surrounding the third gate insulating film and composed of at least a metal, and
a first gate wire connected to the second gate electrode, and wherein: said first island-shaped semiconductor layer has a peripheral length less than twice a peripheral length of said second island-shaped semiconductor layer, and a voltage to be applied to said second gate electrode is lower than a voltage to be applied to said third first-conductivity-type high-concentration semiconductor layer when data is read;
a second driver transistor including
a fifth island-shaped semiconductor layer,
a eighth first-conductivity-type high-concentration semiconductor layer formed on the upper part of the fifth island-shaped semiconductor layer,
a ninth first-conductivity-type high-concentration semiconductor layer formed on the lower part of the fifth island-shaped semiconductor layer,
a sixth second-conductivity-type semiconductor layer formed between the eighth first-conductivity-type high-concentration semiconductor layer and the ninth first-conductivity-type high-concentration semiconductor layer,
a fifth gate insulating film formed surrounding the sixth second-conductivity-type semiconductor layer, and
a fifth gate electrode formed surrounding the fifth gate insulating film and composed of at least a metal;
a second selection transistor including
a sixth island-shaped semiconductor layer,
a tenth first-conductivity-type high-concentration semiconductor layer formed on the upper part of the sixth island-shaped semiconductor layer,
a eleventh first-conductivity-type high-concentration semiconductor layer formed on the lower part of the sixth island-shaped semiconductor layer,
a seventh second-conductivity-type semiconductor layer formed between the tenth first-conductivity-type high-concentration semiconductor layer and the eleventh first-conductivity-type high-concentration semiconductor layer,
a sixth gate insulating film formed surrounding the seventh second-conductivity-type semiconductor layer, and
a sixth gate electrode formed surrounding the sixth gate insulating film and composed of at least a metal;
a second load transistor including
a seventh island-shaped semiconductor layer,
a eighth second-conductivity-type high-concentration semiconductor layer formed on the upper part of the seventh island-shaped semiconductor layer,
a ninth second-conductivity-type high-concentration semiconductor layer formed on the lower part of the seventh island-shaped semiconductor layer,
a twelfth first-conductivity-type semiconductor layer formed between the eighth second-conductivity-type high-concentration semiconductor layer and the ninth second-conductivity-type high-concentration semiconductor layer,
a seventh gate insulating film formed surrounding the twelfth first-conductivity-type semiconductor layer, and
a seventh gate electrode formed surrounding the seventh gate insulating film and composed of at least a metal; and
a second gate wire connected to the sixth gate electrode,
and wherein:
the second first-conductivity-type high-concentration semiconductor and the fourth first-conductivity-type high-concentration semiconductor layer and the fourth second-conductivity-type high-concentration semiconductor are connected,
the first gate electrode and the third gate electrode are connected,
the ninth first-conductivity-type high-concentration semiconductor layer and the eleventh first-conductivity-type high-concentration semiconductor and the ninth second-conductivity-type high-concentration semiconductor are connected, and
the fifth gate electrode and the seventh gate electrode are connected.
2. The semiconductor device according to claim 1 , further comprising a first pass transistor including:
a fourth island-shaped semiconductor layer,
a sixth first-conductivity-type high-concentration semiconductor layer formed on the upper part of the fourth island-shaped semiconductor layer,
a seventh first-conductivity-type high-concentration semiconductor layer formed on the lower part of the fourth island-shaped semiconductor layer,
a fifth second-conductivity-type semiconductor layer formed between the sixth first-conductivity-type high-concentration semiconductor layer and the seventh first-conductivity-type high-concentration semiconductor layer,
a fourth gate insulating film formed surrounding the fifth second-conductivity-type semiconductor layer, and
a fourth gate electrode formed surrounding the fourth gate insulating film and composed of at least a metal,
a wiring connecting said seventh first-conductivity-type high-concentration semiconductor layer and said first gate wire to one another, and wherein:
a power supply voltage is applied to said sixth first-conductivity-type high-concentration semiconductor layer; and
a voltage lower than the power supply voltage is output to said seventh first-conductivity-type high-concentration semiconductor layer.
3. The semiconductor device according to claim 2 , wherein a voltage to be applied to said fourth gate electrode is the power supply voltage.
4. . The semiconductor device according to claim 1 , further comprising a first pass transistor including:
a fourth island-shaped semiconductor layer,
a sixth first-conductivity-type high-concentration semiconductor layer formed on the upper part of the fourth island-shaped semiconductor layer,
a seventh first-conductivity-type high-concentration semiconductor layer formed on the lower part of the fourth island-shaped semiconductor layer,
a fifth second-conductivity-type semiconductor layer formed between the sixth first-conductivity-type high-concentration semiconductor layer and the seventh first-conductivity-type high-concentration semiconductor layer,
a fourth gate insulating film formed surrounding the fifth second-conductivity-type semiconductor layer, and
a fourth gate electrode formed surrounding the fourth gate insulating film and composed of at least a metal,
a wiring connecting said sixth first-conductivity-type high-concentration semiconductor layer and said first gate wire to one another, and wherein:
a power supply voltage is applied to said seventh first-conductivity-type high-concentration semiconductor layer, and
a voltage lower than the power supply voltage is output to said sixth first-conductivity-type high-concentration semiconductor layer.
5. The semiconductor device according to claim 4 , wherein a voltage to be applied to said fourth gate electrode is the power supply voltage.