IP Library Granted Patent US 8,796,745
Granted Patent B2
US 8,796,745 · App. 13/540,813 · Granted Aug 5, 2014

Monolithically integrated active snubber

Inventor: Christopher Boguslaw Kocon (Mountain Top, PA)
Assignee: Texas Instruments Incorporated
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Quick Facts
Patent No.
US 8,796,745
App. No.
13/540,813
Granted
Aug 5, 2014
Kind
B2
Abstract

A semiconductor device containing an extended drain MOS transistor with an integrated snubber formed by forming a drain drift region of the MOS transistor, forming a snubber capacitor including a capacitor dielectric layer and capacitor plate over the extended drain, and forming a snubber resistor over a gate of the MOS transistor so that the resistor is connected in series between the capacitor plate and a source of the MOS transistor.

Claims (14)

1. A semiconductor device, comprising:

a semiconductor substrate;

an extended drain metal oxide semiconductor (MOS) transistor, including:

a drain drift region disposed in said substrate, said drain drift region having a first conductivity type;

a body region disposed in said substrate, such that said body region abuts said drain drift region at a top surface of said substrate, said body region having a second conductivity type opposite from said first conductivity type;

a gate disposed over said substrate, said gate overlapping a portion of said drain drift region and a portion of said body region; and

a source region disposed in said substrate adjacent to said gate and opposite from said drain drift region, said source region having said first conductivity type;

an integrated snubber, including:

a snubber capacitor, said snubber capacitor including said drain drift region and further including:

a snubber dielectric layer disposed over said drain drift region; and

a snubber capacitor plate disposed over said snubber dielectric layer; and

a snubber resistor disposed over a pre-metal dielectric (PMD) layer disposed over said gate, said source region and said drain drift region, said snubber resistor being electrically coupled to said source region through at least one transistor source contact, said transistor source contact being disposed in said PMD layer on said source region, and electrically coupled to said snubber capacitor plate through at least one snubber capacitor contact, said snubber capacitor contact being disposed in said PMD layer on said snubber capacitor plate, said snubber resistor including at least one layer of material selected from the group consisting of polysilicon, tungsten silicide, titanium silicide, cobalt silicide, nickel silicide, aluminum, tungsten, titanium, tantalum, titanium tungsten, titanium nitride, tantalum nitride, nickel chromium, silicon chromium, and cermet; and

a source interconnect disposed on said snubber resistor over said transistor source contact so as to make electrical connection with said transistor source contact through said snubber resistor.

2. The semiconductor device of claim 1 , in which said snubber resistor includes at least one resistor aperture disposed through said snubber resistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2012
From: KOCON, CHRISTOPHER BOGUSLAW
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 028713/0680 →
Continuity (2)
Provisional Application 61504624 · Jul 5, 2011
Related Publication 20130009225A1 · Jan 10, 2013