IP Library Granted Patent US 8,799,705
Granted Patent B2
US 8,799,705 · App. 13/420,633 · Granted Aug 5, 2014

Data protection in a random access disk array

Inventors: Renen Hallak (Tel-Aviv, IL); Tal Ben Moshe (Kiryat-Ono, IL); Niko Farhi (Tel-Aviv, IL); Erez Webman (Petach-Tikva, IL)
Assignee: EMC Corporation
G06F11/1076G06F11/1092
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Quick Facts
Patent No.
US 8,799,705
App. No.
13/420,633
Filed
Mar 15, 2012
Granted
Aug 5, 2014
Kind
B2
Art Unit
2114
USPC
714/6.24
Abstract

A disk array memory system comprises: a plurality of disks in a disk array for storage of content data and parity data in stripes, content data in a same stripe sharing parity bits of said parity data, each disk having a spare disk capacity including at least some of a predefined array spare capacity, said array spare capacity providing a dynamic space reserve over said array to permit data recovery following a disk failure event; a cache for caching content data prior to writing to said disk array; and a controller configured to select a stripe currently having a largest spare stripe capacity, for a current write operation of data from said cache, thereby to write all said data of said current write operation on a same stripe, thereby to maximize sharing of parity bits per write operation and minimize separate parity write operations.

Claims (42)

1. A disk array memory system comprising

a plurality of disks in a disk array for storage of content data and parity data in stripes, content data in a same stripe sharing parity bits of said parity data, each stripe having a spare stripe capacity including at least some of a predefined array spare capacity, said array spare capacity providing a dynamic space reserve over said array to permit data recovery following a disk failure event;

a cache for caching content data for aggregation prior to writing to said disk array;

a controller configured to select a stripe currently having a largest spare stripe capacity, for a current write operation of aggregated data from said cache, thereby to write all said aggregated data of said current write operation on a same stripe, thereby to maximize sharing of parity bits per write operation and minimize separate parity write operations.

2. The disk array memory system of claim 1 , further comprising a table for mapping of physical locations of said content data as defined by respective write operations with corresponding logical locations of said data.

3. The disk array of claim 2 , wherein said data is written on said disks in blocks and wherein a granularity of said table is a size of said blocks.

4. The disk array memory system of claim 2 , wherein said controller is configured to use said table to balance write operations between respective disks of said array.

5. The disk array memory system of claim 2 , wherein said controller is configured to use said table to divert a current write operation from a disk which is temporarily unavailable.

6. The disk array memory system of claim 1 , wherein said disk array has a stripe size, said stripe size being differentially variable.

7. The disk array memory system of claim 6 , wherein said disks in said array have respectively different capacities, said stripe size being such as to provide for even distribution of stripes over said disks, in proportion to said respective capacity at each disk.

8. The disk array memory system of claim 7 , said stripes having parity columns for said parity bits, said parity columns being distributed evenly over said disks.

9. The disk array memory system of claim 1 , wherein said controller is configured to use said parity data to recover content data lost in said disk failure event and to write said recovered content data into said dynamic space reserve.

10. The disk array memory system of claim 1 , wherein said disk array is arranged into blocks, and wherein each block is assigned one of three states, in use, not in use and not in parity, said not in parity state allowing for ignoring physical data and treating it as zeroed out.

11. The disk array memory system of claim 1 , configured as a RAID 6 array using two parity columns, said two columns being distributed in respectively different directions.

12. The disk array memory system of claim 1 , wherein different amounts of spare stripe capacities are defined for respective sections, thereby to provide variable levels of performance over said array.

13. A disk array memory system comprising

a plurality of disks in a disk array for storage of content data and parity data in stripes, content data in a same stripe sharing parity bits of said parity data,

a cache for caching content data prior to writing to said disk array;

a controller configured to select a stripe for a current write operation of data from said cache, thereby to write all said content data of said current write operation and corresponding parity data on a same stripe at a same physical location, and irrespective of logical relationships of parts of said content data; and the controller utilizing a mapping table to map between physical locations and logical relationships of said content data.

14. A disk array memory method comprising

providing a plurality of disks in a disk array,

storing content data and parity data in stripes within said disk array, wherein content data in a same stripe shares parity bits of said parity data,

for said array defining an array spare capacity, said array spare capacity providing a dynamic space reserve over said array to permit data recovery following a disk failure event;

caching content data to aggregate data from multiple write operations into a single aggregated write operation prior to writing to said disk array;

selecting a stripe having a largest spare stripe capacity;

writing said aggregated cached data in a single write operation to said selected stripe, thereby to maximize sharing of parity bits per write operation and minimize separate parity write operations.

15. The disk array memory method of claim 14 , comprising mapping, using a table, of physical locations of said content data as defined by respective write operations with corresponding logical locations of said data.

16. The disk array method of claim 15 , wherein said table has a granularity of a data block.

17. The disk array memory method of claim 15 , comprising using said table to balance write operations between respective disks of said array.

18. The disk array memory method of claim 15 , comprising using said table to divert a current write operation from a disk which is temporarily unavailable.

19. The disk array memory method of claim 14 , wherein said disk array has a stripe size, said stripe size being differentially variable.

20. The disk array memory method of claim 19 , wherein said disks in said array have respectively different capacities, said stripe size being such as to provide for even distribution of stripes over said disks, in proportion to said respective capacity at each disk.

21. The disk array memory method of claim 20 , said stripes having parity columns for said parity bits, said parity columns being distributed evenly over said disks.

22. The disk array memory method of claim 14 , comprising using said parity data to recover content data lost in said disk failure event and to write said recovered content data into said dynamic space reserve.

23. The disk array memory method of claim 14 , wherein said disk array is arranged into blocks, and wherein each block is assigned one of three states, in use, not in use and not in parity, said not in parity state allowing for ignoring physical data and treating it as zeroed out.

24. The disk array memory method of claim 14 , configured as a RAID 6 array using two parity columns, said two columns being distributed in respectively different directions.

25. The disk array memory method of claim 14 , wherein different amounts of spare stripe capacities are defined for respective sections, thereby to provide variable levels of performance over said array.

26. A disk array memory method comprising

providing a plurality of disks in a disk array for storage of content data and parity data in stripes, content data in a same stripe sharing parity bits of said parity data,

caching content data prior to writing to said disk array;

selecting a stripe for a current write operation of data from said cache, thereby to write all said content data of said current write operation and corresponding parity data on a same stripe at a same physical location, and irrespective of logical relationships of parts of said content data; and

utilizing a mapping table to map between physical locations and logical relationships of said content data.

Assignments (11)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045455/0001) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
Reel/Frame 061753/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040136/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
Reel/Frame 061324/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 3, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL, L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058216/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2016
From: EMC CORPORATION
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 040203/0001 →
SECURITY AGREEMENT Recorded Sep 21, 2016
From: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; SPANNING CLOUD APPS LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 040136/0001 →
SECURITY AGREEMENT Recorded Sep 21, 2016
From: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; SPANNING CLOUD APPS LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040134/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2013
From: XTREMIO LIMITED
To: EMC CORPORATION
Reel/Frame 029763/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2012
From: HALLAK, RENEN; BEN MOSHE, TAL; FARHI, NIKO; WEBMAN, EREZ
To: XTREMIO LTD.
Reel/Frame 027882/0121 →
Continuity (2)
Provisional Application 61582841 · Jan 4, 2012
Related Publication 20130173955A1 · Jul 4, 2013