Solid-state imaging apparatus, method of manufacturing same, and electronic apparatus
View Patent ↗A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.
1. A solid-state imaging apparatus comprising:
a charge storage area of a second-conductivity-type between a semiconductor area of the second-conductivity-type and a first surface pinning area a first-conductivity-type, an impurity concentration of the second-conductivity-type in said semiconductor area being lower than an impurity concentration of the second-conductivity-type in said charge storage area;
an overflow barrier of the second-conductivity-type between a second surface pinning area of the first-conductivity-type and a portion of a semiconductor well, an impurity concentration of the second-conductivity-type in said overflow barrier being lower than said impurity concentration of the second-conductivity-type in said semiconductor area;
wherein said overflow barrier is in physical contact with a floating diffusion unit of the second-conductivity-type and said charge storage area, and
wherein said second surface pinning area is in physical contact with said floating diffusion unit and said first surface pinning area.
2. The solid-state imaging apparatus according to claim 1 , wherein a conductivity of the first-conductivity-type is opposite to a conductivity of the second-conductivity-type.
3. The solid-state imaging apparatus according to claim 1 , wherein said first-conductivity-type is p-type and said second-conductivity-type is n-type.
4. The solid-state imaging apparatus according to claim 1 , wherein said semiconductor well is of the first-conductivity-type.
5. The solid-state imaging apparatus according to claim 1 , wherein said first surface pinning area and said second surface pinning area extend into said semiconductor well from a surface of the semiconductor well.
6. The solid-state imaging apparatus according to claim 1 , wherein said charge storage area is in physical contact with said semiconductor area and said first surface pinning area.
7. The solid-state imaging apparatus according to claim 1 , wherein said overflow barrier is in physical contact with said second surface pinning area and said portion of the semiconductor well.
8. The solid-state imaging apparatus according to claim 1 , further comprising:
a gate insulating film between a transfer gate electrode and said second surface pinning area.
9. The solid-state imaging apparatus according to claim 8 , wherein said first surface pinning area is between said charge storage area and said gate insulating film.
10. The solid-state imaging apparatus according to claim 1 , wherein said portion of the semiconductor well is between said charge storage area and said floating diffusion unit.
11. The solid-state imaging apparatus according to claim 1 , wherein said impurity concentration of the second-conductivity-type in said charge storage area is lower than an impurity concentration of the second-conductivity-type in said floating diffusion unit.
12. The solid-state imaging apparatus according to claim 1 , wherein said semiconductor area is between a low concentration semiconductor area of the second-conductivity-type and said charge storage area.
13. The solid-state imaging apparatus according to claim 12 , wherein an impurity concentration of the second-conductivity-type in said low concentration semiconductor area is lower than said impurity concentration of the second-conductivity-type in said charge storage area.
14. The solid-state imaging apparatus according to claim 12 , wherein an impurity concentration of the first-conductivity-type in said portion of the semiconductor well is lower than an impurity concentration of the first-conductivity-type in said second surface pinning area.
15. The solid-state imaging apparatus according to claim 14 , wherein an impurity concentration of the first-conductivity-type in said first surface pinning area is higher than said impurity concentration of the first-conductivity-type in said second surface pinning area.
16. An electronic apparatus comprising:
an optical system configured to guide incident light onto the solid-state imaging apparatus of claim 1 ;
a signal processing circuit configured to process a signal charge, said solid-state imaging apparatus being configured to convert said incident light into said signal charge.