IP Library Granted Patent US 8,869,103
Granted Patent B2
US 8,869,103 · App. 13/250,577 · Granted Oct 21, 2014

Using intermediate representations to verify computer-executable code generated from a model

Inventors: Mirko Conrad (Watertown, MA); Xiaocang Lin (Wayland, MA); Jun Yan (Westborough, MA); Peter Szpak (Newton, MA); Appa Rao Nirakh (Framingham, MA); Jaya Shankar (Natick, MA)
Assignee: The MathWorks, Inc.
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Quick Facts
Patent No.
US 8,869,103
App. No.
13/250,577
Granted
Oct 21, 2014
Kind
B2
Abstract

In an embodiment, a model is sliced into a plurality of slices. A slice in the plurality of slices is selected. A portion of code, that corresponds to the selected slice, is identified from code generated from the model. The identified code is verified to be equivalent to the selected slice. Equivalence may include equivalent functionality, equivalent data types, equivalent performance, and/or other forms of equivalence between the selected slice and the identified generated code.

Claims (111)

1. One or more tangible non-transitory computer-readable storage media storing instructions, the instructions comprising:

one or more instructions that, when executed by one or more processors, cause the one or more processors to:

acquire an annotation of a block,

the block being included in a block diagram model, and

the annotation including information for use in identifying expected code for the block,

the expected code representing a functionality associated with the block;

identify the expected code for the block based on the annotation;

acquire code that is generated for the block based on the block diagram model;

generate a first intermediate representation based on the expected code;

determine a first pattern based on the first intermediate representation,

the first pattern representing the functionality associated with the block;

determine a second pattern based on the code that is generated for the block,

the second pattern representing a functionality of the code that is generated for the block;

perform a semantic equivalent transform on the first pattern and the second pattern to generate a normalized first pattern and a normalized second pattern; and

verify that the code that is generated for the block is equivalent to the expected code based on the normalized first pattern and the normalized second pattern.

2. The one or more tangible non-transitory computer-readable storage media of claim 1 , where the block is an S-function block, and

where the annotation is associated with code specified for the S-function block.

3. The one or more tangible non-transitory computer-readable storage media of claim 1 , where the block is an unrecognized block, and

where the annotation includes a description of a function associated with the block.

4. The one or more tangible non-transitory computer-readable storage media of claim 1 , where the block is a particular type of block, and

where instructions further comprise:

one or more instructions that, when executed by the one or more processors, cause the one or more processors to associate the first pattern with the particular type of block based on verifying that the code that is generated for the block is equivalent to the expected code; and integrate, based on associating the first pattern with the particular type of block, the first pattern into a process used to verify the particular type of block.

5. The one or more tangible non-transitory computer-readable storage media of claim 1 , where the block is a first block, and

where the instructions further comprise:

one or more instructions that, when executed by the one or more processors, cause the one or more processors to verify, based on the first pattern, code that is generated for a second block included in the block diagram model,

the second block being a type of block corresponding to the block.

6. The one or more tangible non-transitory computer-readable storage media of claim 1 , where the block is a first block,

where the one or more instructions to determine the first pattern include:

one or more instructions that, when executed by the one or more processors, cause the one or more processors to:

determine the first pattern based on the annotation, and where the instructions further comprise:

one or more instructions that, when executed by the one or more processors, cause the one or more processors to:

acquire code for a second block included in the block diagram model,

the second block being of a block type that is equivalent to a type of block corresponding to the first block; and

verify the acquired code for the second block based on the first pattern.

7. The one or more tangible non-transitory computer-readable storage media of claim 1 , where the code that is generated for the block is at least one of:

generated by a code generator,

retrieved from a storage device, or

received via a communications network.

8. A method comprising:

acquiring an annotation of a model element included in a model,

the annotation including information for use in identifying expected code for the model element,

the expected code representing a functionality associated with the model element, and

acquiring the annotation being performed by a device;

identifying the expected code for the model element based on the annotation,

identifying the expected code being performed by the device;

acquiring code that is generated for the model element,

acquiring the code being performed by the device;

generating a first intermediate representation based on the expected code,

generating the first intermediate representation being performed by the device;

determining, based on the first intermediate representation, a first pattern,

determining the first pattern being performed by the device;

determining, based on the code that is generated for the model element, a second pattern,

determining the second pattern being performed by the device, and

the second pattern representing a functionality of the code that is generated for the model element;

generating, based on the first pattern and the second pattern, a normalized first pattern and a normalized second pattern,

generating the normalized first pattern and the normalized second pattern being performed by the device; and

verifying, based on the normalized first pattern and the normalized second pattern, that the code generated for the model element is equivalent to the expected code,

verifying that the code generated for the model element is equivalent to the expected code being performed by the device.

9. The method of claim 8 , where the model element is a particular type of model element, the method further comprising:

associating the first pattern with the particular type of model element based on verifying that the code generated for the model element is equivalent to the expected code.

10. The method of claim 8 , further comprising:

receiving an indication that the first pattern is acceptable for verifying code that is generated for a type of model element corresponding to the model element; and

incorporating, based on the indication, the first pattern into a verification procedure that is used to verify that acquired code associated with the type of model element is equivalent to expected code associated with the type of model element.

11. The method of claim 8 , where generating the first intermediate representation includes:

generating, based on the expected code, at least one of an abstract syntax tree, an element connectivity list, or a program dependency graph.

12. The method of claim 8 , where the model element is an S-function block, and

where the annotation is associated with code specified for the S-function block.

13. The method of claim 8 , where the model element is an unrecognized model element, and

where the annotation includes a description of a function associated with the model element.

14. The method of claim 8 , where identifying the expected code includes:

identifying a first version of the expected code based on the annotation;

receiving an indication,

the indication indicating that a second version of the expected code is to be used in place of the first version of the expected code; and

identifying the second version of the expected code as the expected code based on the indication.

15. A system comprising:

a processor to:

acquire an annotation of a block,

the block being part of a block diagram model, and

the annotation including information for use in identifying expected code for the block,

the expected code representing a functionality associated with the block,

identify the expected code for the block based on the annotation,

acquire code that is generated for the block,

generate a first intermediate representation based on the expected code,

determine a first pattern based on the first intermediate representation,

the first pattern representing the functionality associated with the block;

determine a second pattern based on the code that is generated for the block,

the second pattern representing a functionality of the code that is generated for the block,

perform a semantic equivalent transform based on the first pattern and the second pattern, and

verify, based on performing the semantic equivalent transform, that the code generated for the block is equivalent to the expected code.

16. The system of claim 15 , where the block is a first block

where the processor is further to:

acquire code for a second block,

the second block being part of the block diagram model, and

the second block being of a block type that is equivalent to

a type of block corresponding to the first block; and

determine, based on the first pattern, whether the acquired code for the second block is equivalent to expected code associated with the second block.

17. The system of claim 15 , where, when generating the first intermediate representation, the processor is to:

generate an element connectivity list based on the block diagram model,

the element connectivity list including an ordered list of elements and connections included in the block diagram model, and

the ordered list of elements including an element corresponding to the block, and

generate an abstract syntax tree based on the code that is generated for the block,

the abstract syntax tree including a tree representation of the generated code, and

the tree representation including a component corresponding to a construct included in the code generated for the block,

the construct being associated with the functionality associated with the block.

18. The system of claim 15 , where, when verifying that the code generated for the block is equivalent to the expected code, the processor is to:

determine that the code generated for the block is semantically equivalent to the expected code.

19. The system of claim 15 , where, when verifying that the code generated for the block is equivalent to the expected code, the processor is further to:

determine that the code generated for the block reproduces the functionality associated with the block.

20. The system of claim 15 , where the functionality associated with the block is a first functionality, and

where, when verifying that the code generated for the block is equivalent to the expected code, the processor is further to:

determine that the code generated for the block does not introduce a second functionality that is not associated with the block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2011
From: CONRAD, MIRKO; LIN, XIAOCANG; YAN, JUN; SZPAK, PETER; NIRAKH, APPA RAO; SHANKAR, JAYA
To: THE MATHWORKS, INC.
Reel/Frame 027423/0810 →
Continuity (7)
Continuation In Part 12559233 · Sep 14, 2009
Continuation In Part 12559250 · Sep 14, 2009
Provisional Application 61509371 · Jul 19, 2011
Provisional Application 61494274 · Jun 7, 2011
Provisional Application 61103167 · Oct 6, 2008
Provisional Application 61103161 · Oct 6, 2008
Related Publication 20120254830A1 · Oct 4, 2012