IP Library Granted Patent US 8,901,952
Granted Patent B2
US 8,901,952 · App. 13/140,418 · Granted Dec 2, 2014

Circuit testing device and method for implementing same

Inventors: Katell Moreau (Paris, FR); Marc Grieu (Ivry sur Seine, FR)
Assignee: European Aeronautics Defence and Space Company Eads France
G01R31/048G01R31/2817
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Quick Facts
Patent No.
US 8,901,952
App. No.
13/140,418
Granted
Dec 2, 2014
Kind
B2
Abstract

A device for testing a circuit made up of a printed circuit board on which components, preferably dummy components, are assembled by the solder connections. An enclosure of the testing device subjects the circuit under test to a schedule of thermo-mechanical and/or vibration constraints. Bridges of electrical resistors, forms a hardware portion of the testing device. A software portion of the testing device sets a detection criterion representing damage to one or more solder connections and displays the results of the test. An input/output interface converts each electrical resistor measurement of the tested chains of solder connections into data for use the software portion. An adjusting component modifies the criterion for detecting damage to the solder connections.

Claims (25)

1. A device for testing a circuit comprising a printed circuit board on which electronic components are assembled by means of solder connections, comprising

a climatic enclosure for subjecting the circuit under test to a schedule of thermo-mechanical or vibration stresses;

a hardware component comprising bridges of electrical resistors to measure an overall electrical resistance of multiple solder connections of the circuit under test that are electrically interconnected, each one to the next;

a computer system for performing in situ analysis of the measurement provided by the hardware component and further comprising:

a software component executed by the computer system sets a detection criterion representing damage to one or more solder connections that make up the assembly of electronic components on the printed circuit board for a test;

a display for displaying the results of the test;

an input/output interface for converting each electrical resistor measurement of chains of solder connections tested into data for use by the software component; and

wherein the software component is operable to modify the detection criterion for detecting damage to the soldered connections.

2. The device of claim 1 , wherein the software component is operable to modify a threshold for detecting a level of electrical resistance in the circuit under test.

3. The device of claim 2 , wherein the software component is operable to set the threshold for detecting the level of electrical resistance in the electronic component of the circuit under test.

4. The device of claim 1 , wherein the software component is operable to modify a number of state changes in the circuit under test to be detected in order to validate the detection criterion initially selected by a user.

5. The device of claim 4 , wherein the software component is operable to determine a number of peaks to be detected for an application of the detection criterion.

6. The device of claims 1 , wherein the software component is operable to modify a time interval between two state change detections in the circuit under test.

7. The device of claim 6 , wherein the software component is operable to determine a time interval after a peak in order to detect a subsequent peak.

8. The device of claim 6 , wherein a minimum time interval between two detected state changes in a electronic component is 250 ns.

9. The device of claim 1 , wherein a duration of the electrical resistance peaks to be detected is adjustable between 250 ns and 1 μs.

10. The device of claim 9 , wherein a duration between the start of the test and a first detected peak in electrical resistance for the detection criterion selected by a user is adjustable.

11. The device of claim 1 , wherein the software component is operable to record and process results of the test in real time.

12. The device of claim 1 , wherein the hardware component is integrated on a printed circuit board outside of the enclosure.

13. The device of claim 1 , wherein the electronic components are dummy components.

14. A method for testing a circuit comprising a printed circuit board on which electronic components are assembled by means of solder connections using the device of claim 1 , comprising the steps of:

initializing parameters for detecting damage in the solder connections by the software component of the computer system;

detecting and recording state changes for the electrical resistance of one or more solder connections to be tested by the hardware component, which is characterized by peaks of electrical resistance with a duration between 250 ns and 1 μs;

transmitting state changes to the software component for analysis by the input/output interface of the computer system; and

recording, by the computer system, a location of the electronic component on the circuit under test and an associated solder connection chain if a crack is detected on one of the chains of the soldered connections tested.

Assignments (2)
CHANGE OF NAME Recorded Aug 18, 2015
From: EUROPEAN AERONAUTIC DEFENCE AND SPACE COMPANY EADS FRANCE
To: AIRBUS GROUP SAS
Reel/Frame 036352/0047 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2011
From: MOREAU, KATELL; GRIEU, MARC
To: EUROPEAN AERONAUTIC DEFENCE AND SPACE COMPANY EADS FRANCE
Reel/Frame 027092/0339 →
Priority Claims (1)
FR 08 58735 · Dec 17, 2008 · national
Continuity (1)
Related Publication 20120025864A1 · Feb 2, 2012