Mounted structure
View Patent ↗A mounted structure includes an electrode of a substrate, an electrode of a semiconductor element, and a mounted layers for bonding the electrode of the substrate and the electrode of the semiconductor element, and the mounted layers includes: a first intermetallic compound layer containing a CuSn-based intermetallic compound; a Bi layer; a second intermetallic compound layer containing a CuSn-based intermetallic compound; a Cu layer; and a third intermetallic compound layer containing a CuSn-based intermetallic compound, and the above layers are sequentially arranged from the electrode of the substrate toward the electrode of the semiconductor element to configure the mounted layers.
1. A mounted structure comprising:
an electrode of a substrate;
an electrode of a semiconductor element; and
a mounted layers that bonds the electrode of the substrate and the electrode of the semiconductor element,
wherein the mounted layers includes along a direction from the substrate toward the semiconductor element:
a first intermetallic compound layer containing a CuSn-based intermetallic compound;
a Bi layer;
a second intermetallic compound layer containing a CuSn-based intermetallic compound;
a Cu layer; and
a third intermetallic compound layer containing a CuSn-based intermetallic compound.
2. The mounted structure according to claim 1 , wherein the mounted layers further includes:
a Bi layer; and
a fourth intermetallic compound layer containing a CuSn-based intermetallic compound, and
the above layers are sequentially arranged between the third intermetallic compound layer and the electrode of the semiconductor element.
3. The mounted structure according to claim 1 , wherein the CuSn-based intermetallic compound includes at least one intermetallic compound of Cu 6 Sn 5 and Cu 3 Sn.
4. The mounted structure according to claim 1 , wherein the Cu layer has a thickness of 6.2 μm or more.
5. The mounted structure according to claim 4 , wherein a mount plane between the mounted layers and the electrode of the semiconductor element has an area of between 5 mm 2 and 100 mm 2 .
6. The mounted structure according to claim 1 , wherein the first intermetallic compound layer contains the CuSn-based intermetallic compound, and includes an AgSn-based intermetallic compound.
7. The mounted structure according to claim 2 , wherein the fourth intermetallic compound layer contains the CuSn-based intermetallic compound, and includes an AgSn-based intermetallic compound.