IP Library Granted Patent US 9,024,920
Granted Patent B2
US 9,024,920 · App. 13/186,075 · Granted May 5, 2015

Drive voltage generator

Inventors: Hiroshi Kojima (Shiga, JP); Kazuyoshi Nishi (Kyoto, JP); Takashi Koizumi (Shiga, JP); Mika Nakamura (Osaka, JP); Yosuke Izawa (Osaka, JP)
Assignee: Panasonic Intellectual Property Management Co., Ltd.
G09G3/3291G09G3/3688G09G3/3696G09G2310/027G09G2310/0291G09G2330/021G09G2330/028G09G2360/16
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Quick Facts
Patent No.
US 9,024,920
App. No.
13/186,075
Granted
May 5, 2015
Kind
B2
Abstract

N drivers convert n digital values into n voltages. N amplifiers amplify the n voltages, thereby generate n drive voltages. An amplifier voltage supply supplies an amplifier voltage for driving the n amplifiers. An amplifier voltage controller detects a maximum digital value among a plurality of digital values, and sets the amplifier voltage to a voltage value dependent on the maximum digital value.

Claims (43)

1. A drive voltage generator which periodically receives n (where n≧2) digital values, and generates n drive voltages corresponding to the n digital values, comprising:

n drivers corresponding to the n digital values;

n amplifiers corresponding to the n drivers;

an amplifier voltage supply; and

an amplifier voltage controller,

wherein

each of the n drivers converts a digital value corresponding to that driver into a voltage,

each of the n amplifiers amplifies a voltage obtained by a driver corresponding to that amplifier, thereby generates one of the drive voltages,

the amplifier voltage supply supplies an amplifier voltage for driving the n amplifiers, and

the amplifier voltage controller detects a maximum digital value among n·q (where q≧1) digital values supplied to the drive voltage generator, and sets the amplifier voltage supplied by the amplifier voltage supply to a voltage value dependent on the maximum digital value,

the drive voltage generator further comprising:

a reference voltage supply configured to supply a reference voltage;

a gradation voltage generator configured to generate a plurality of gradation voltages different from one another based on the reference voltage supplied by the reference voltage supply;

a reference voltage controller configured to detect a maximum digital value among n·r (where r≧1) digital values supplied to the drive voltage generator, and to set the reference voltage supplied by the reference voltage supply to a voltage value dependent on the maximum digital value; and

a data processor configured to process the n·r digital values based on a ratio between a voltage value of the reference voltage set by the reference voltage controller and a predetermined reference voltage value, and to supply processed n·r digital values to the n drivers,

wherein each of the n drivers selects one gradation voltage from the plurality of gradation voltages based on a digital value corresponding to that driver.

2. A drive voltage generator which periodically receives n (where n≧2) digital values, and generates n drive voltages corresponding to the n digital values, comprising:

n drivers corresponding to the n digital values;

n amplifiers corresponding to the n drivers;

an amplifier voltage supply; and

an amplifier voltage controller,

wherein

each of the n drivers converts a digital value corresponding to that driver into a voltage,

each of the n amplifiers amplifies a voltage obtained by a driver corresponding to that amplifier, thereby generates one of the drive voltages,

the amplifier voltage supply supplies an amplifier voltage for driving the n amplifiers, and

the amplifier voltage controller detects a maximum digital value among n·q (where q≧1) digital values supplied to the drive voltage generator, and sets the amplifier voltage supplied by the amplifier voltage supply to a voltage value dependent on the maximum digital value,

the drive voltage generator further comprising:

a gain controller configured to detect a maximum digital value among n·s (where s≧1) digital values supplied to the drive voltage generator, and to set a gain value of each of the n amplifiers to a gain value dependent on the maximum digital value; and

a data processor configured to process the n·s digital values based on a ratio between the gain value set by the gain controller and a predetermined reference gain value, and to supply processed n·s digital values to the n drivers.

3. A drive voltage generator which periodically receives n (where n≧2) digital values, and generates n drive voltages corresponding to the n digital values, comprising:

n drivers corresponding to the n digital values;

n amplifiers corresponding to the n drivers;

an amplifier voltage supply; and

an amplifier voltage controller,

wherein

each of the n drivers converts a digital value corresponding to that driver into a voltage,

each of the n amplifiers amplifies a voltage obtained by a driver corresponding to that amplifier, thereby generates one of the drive voltages,

the amplifier voltage supply supplies an amplifier voltage for driving the n amplifiers,

the amplifier voltage controller detects a maximum digital value among n·q (where q≧1) digital values supplied to the drive voltage generator, and sets the amplifier voltage supplied by the amplifier voltage supply to a voltage value dependent on the maximum digital value, and

the amplifier voltage supply selects, as controlled by the amplifier voltage controller, an analog voltage corresponding to the maximum digital value from i (where i≧2) analog voltages different from one another as the amplifier voltage,

the drive voltage generator further comprising:

an analog voltage supply configured to supply the i analog voltages; and

an analog voltage controller configured to select i thresholds so that if n·v (where v≧1) digital values supplied to the drive voltage generator are distributed to i regions defined by the i thresholds, the numbers of digital values which fall within the respective i regions approach a same value, and to set the i analog voltages supplied by the analog voltage supply respectively to voltage values dependent on the i thresholds.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2011
From: KOJIMA, HIROSHI; NISHI, KAZUYOSHI; KOIZUMI, TAKASHI; NAKAMURA, MIKA; IZAWA, YOSUKE
To: PANASONIC CORPORATION
Reel/Frame 027173/0793 →
Priority Claims (1)
JP 2009-259020 · Nov 12, 2009 · national
Continuity (2)
Continuation PCTJP2010002926 · Apr 22, 2010
Related Publication 20110273425A1 · Nov 10, 2011