Stochastic reflectometer
View Patent ↗Disclosed herein are various embodiments of a time-domain reflectometer having a transmitter configured to apply, to a system under test (SUT), an intensity-modulated probe signal generated based on a periodic pseudo-random bit sequence. The reflectometer further has a receiver configured to receive, back from the SUT, a reflected signal corresponding to the probe signal. The receiver converts the received reflected signal into a binary bit sequence using a relatively simple slicer circuit, and without the use of complex analog circuits and/or multi-bit analog-to-digital converters. The binary bit sequence is then compared with the original pseudo-random bit sequence to obtain a measure of the impulse response of the SUT. In some embodiments, the reflectometer has a controllable noise generator that can be used, e.g., to optimize the obtained measure for the detection of multiple SUT defects having significantly differing reflection characteristics.
1. An apparatus comprising:
a transmitter configured to generate a modulated probe signal including a first sequence of digital symbols corresponding to a first bit sequence and to apply said modulated probe signal to a system under test;
a receiver configured to receive a reflected signal corresponding to the modulated probe signal back from the system under test and to convert the reflected signal into a second bit sequence, wherein the receiver comprises a slicer circuit configured to compare a signal sample corresponding to the reflected signal with a threshold level and to generate a respective bit of the second bit sequence based on said comparison;
a digital circuit configured to compare the first bit sequence with each of a plurality of variously delayed copies of the second bit sequence to generate a measure of an impulse response of the system under test; and
a digital processor configured to process the measure to determine whether one or more defects exist in the system under test, wherein, if the digital processor detects a defect in the system under test, then the digital processor is configured to process the measure to determine a reflection coefficient corresponding to the defect and a travel time of the probe signal to the defect.
2. The apparatus of claim 1 , wherein the slicer circuit is a single-bit analog-to-digital converter.
3. The apparatus of claim 1 , wherein the apparatus is configured to generate the first and second bit sequences so that:
the first bit sequence is periodic, wherein each period has a plurality of time slots, with each time slot having a respective single bit of the first bit sequence; and
the second bit sequence has a plurality of time slots, with each time slot having a respective single bit of the second bit sequence.
4. The apparatus of claim 3 , wherein the first sequence of digital symbols is the first bit sequence.
5. The apparatus of claim 1 , wherein the second bit sequence represents an impulse response of the system under test.
6. The apparatus of claim 1 , wherein the transmitter comprises:
an optical source configured to generate the modulated probe signal, wherein the modulated probe signal is an intensity-modulated optical signal; and
a drive circuit configured to drive the optical source based on the first bit sequence having first and second binary values in a manner that causes the optical source to generate an optical pulse for the intensity-modulated optical signal in response to each first binary value in the first bit sequence, and not to generate an optical pulse for the intensity-modulated optical signal in response to each second binary value in the first bit sequence.
7. The apparatus of claim 6 , wherein:
the reflected signal is an optical signal; and
the receiver further comprises:
an optical detector configured to convert the received reflected signal into a corresponding first electrical signal;
an amplifier configured to convert the first electrical signal into an amplified electrical signal;
a coupling capacitor configured to block a dc component of the amplified electrical signal to generate a second electrical signal; and
a signal sampler configured to sample the second electrical signal to generate the signal samples for the slicer circuit.
8. The apparatus of claim 1 , further comprising:
a noise generator configured to inject noise into the second bit sequence; and
a controller configured to control a level of the noise injected by the noise generator.
9. The apparatus of claim 1 , wherein the digital circuit comprises:
a series of delay elements configured to incrementally delay the second bit sequence with respect to the first bit sequence to generate the plurality of the variously delayed copies of the second bit sequence;
a plurality of XNOR gates, each configured to receive (i) a respective copy of the first bit sequence and (ii) a respective one of the plurality of the variously delayed copies of the second bit sequence from a respective one of the delay elements;
a plurality of counters, each coupled to an output of a respective one of the plurality of the XNOR gates and configured to count a number of first binary values generated by the XNOR gate over a fixed time interval, wherein a set of said counted numbers generated by the plurality of said counters is a measure of the impulse response of the system under test.
10. The apparatus of claim 9 , wherein the fixed time interval has a duration that is an integer multiple of a period of the first bit sequence.
11. The apparatus of claim 1 , further comprising a memory configured to store the generated measure.
12. The apparatus of claim 11 , wherein the digital processor is configured to retrieve the measure from the memory and to process the retrieved measure to determine whether the one or more defects exist in the system under test.
13. The apparatus of claim 12 , wherein, if the digital processor detects first and second defects in the system under test, then the digital processor is configured to process the retrieved measure to determine a respective reflection coefficient corresponding to each of the first and second defects and a respective travel time of the probe signal to each of the first and second defects.
14. The apparatus of claim 1 , wherein the apparatus comprises an optical reflectometer, wherein:
the transmitter is an optical transmitter configured to generate the modulated probe signal so that it is an optical signal; and
the receiver is an optical receiver configured to receive a reflected optical signal corresponding to the optical modulated probe signal generated by the optical transmitter.
15. The apparatus of claim 1 , wherein the apparatus comprises an electrical radio-frequency reflectometer, wherein:
the transmitter is an electrical radio-frequency transmitter configured to generate the modulated probe signal so that it is an electrical signal; and
the receiver is an electrical radio-frequency receiver configured to receive a reflected electrical radio-frequency signal corresponding to the electrical radio-frequency modulated probe signal generated by the electrical radio-frequency transmitter.
16. The apparatus of claim 1 , wherein the apparatus comprises an acoustic reflectometer, wherein:
the transmitter comprises an acoustic transducer configured to generate the modulated probe signal so that it is an acoustic signal; and
the receiver comprises an acoustic microphone configured to receive a reflected acoustic signal corresponding to the acoustic modulated probe signal generated by the acoustic transducer.
17. An apparatus comprising:
a transmitter configured to generate a modulated probe signal including a first sequence of digital symbols corresponding to a first bit sequence and to apply said modulated probe signal to a system under test; and
a receiver configured to receive a reflected signal corresponding to the modulated probe signal back from the system under test and to convert the reflected signal into a second bit sequence, wherein the receiver comprises a slicer circuit configured to compare a signal sample corresponding to the reflected signal with a threshold level and to generate a respective bit of the second bit sequence based on said comparison; and
wherein the transmitter comprises:
an optical source configured to generate the modulated probe signal, wherein the modulated probe signal is an intensity-modulated optical signal; and
a drive circuit configured to drive the optical source based on the first bit sequence having first and second binary values in a manner that causes the optical source to generate an optical pulse for the intensity-modulated optical signal in response to each first binary value in the first bit sequence, and not to generate an optical pulse for the intensity-modulated optical signal in response to each second binary value in the first bit sequence;
wherein the reflected signal is an optical signal; and
wherein the receiver further comprises:
an optical detector configured to convert the received reflected signal into a corresponding first electrical signal;
an amplifier configured to convert the first electrical signal into an amplified electrical signal;
a coupling capacitor configured to block a dc component of the amplified electrical signal to generate a second electrical signal; and
a signal sampler configured to sample the second electrical signal to generate the signal samples for the slicer circuit.
18. An apparatus comprising:
a transmitter configured to generate a modulated probe signal including a first sequence of digital symbols corresponding to a first bit sequence and to apply said modulated probe signal to a system under test;
a receiver configured to receive a reflected signal corresponding to the modulated probe signal back from the system under test and to convert the reflected signal into a second bit sequence, wherein the receiver comprises a slicer circuit configured to compare a signal sample corresponding to the reflected signal with a threshold level and to generate a respective bit of the second bit sequence based on said comparison; and
a digital circuit that comprises:
a series of delay elements configured to incrementally delay the first bit sequence with respect to the second bit sequence to generate a plurality of the variously delayed copies of the first bit sequence;
a plurality of XNOR gates, each configured to receive (i) a respective copy of the second bit sequence and (ii) a respective one of the plurality of the variously delayed copies of the first bit sequence from a respective one of the delay elements;
a plurality of counters, each coupled to an output of a respective one of the plurality of the XNOR gates and configured to count a number of first binary values generated by the XNOR gate over a fixed time interval, wherein a set of said counted numbers generated by the plurality of said counters is a measure of the impulse response of the system under test.