Measurement of the output current of an amplifier circuit

1. An amplifier circuit, comprising:

a first and a second switching element, which are connected in series between a first and a second voltage potential and are configured to be actuated in an amplifier mode in a clocked manner, wherein a capacitive element is connected in parallel to at least one of the first and second switching elements,

a measuring circuit configured to measure switching edges occurring during switching of the switching elements; and

a current-determining circuit configured to determine an output current based on the measured switching edges,

wherein the measuring circuit has a time-to-digital converter configured to measure a time period of a change of a voltage at the midpoint of a series connection of the first and second switching elements, wherein the time period of change occurs during switching of at least one of the first and second switching elements.

2. The amplifier circuit according to claim 1 , wherein the measuring circuit is configured to generate a start signal for the measuring process carried out by the time-to-digital-converter when the voltage at the midpoint of the series connection of the two switching elements exceeds or falls below a first threshold voltage, and to generate a stop signal for the measuring process carried out by the time-to-digital-converter when the voltage at the midpoint of the series connection of the two switching elements exceeds or falls below a second threshold voltage.

3. The amplifier circuit according to claim 2 , wherein the first and the second threshold voltage are selected so as to be almost identical such that they lie approximately in the middle of the supply voltage range of the amplifier circuit.

4. The amplifier circuit according to claim 3 , wherein the measuring circuit comprises one or a plurality of comparators configured to detect when the voltage at the midpoint of the series connection of the first and second switching elements exceeds or falls below the first or the second threshold voltage, and configured to generate the start or stop signal for the time-to-digital converter.

5. The amplifier circuit according to claim 3 wherein the time-to-digital converter is implemented through a field programmable gate array (FPGA), an application specific integrated circuit (ASIC) or a special time-to-digital converter module.

6. The amplifier circuit according to claim 1 , wherein the current-determining circuit is configured to determine the output current using the measured time period of the change of the voltage at the midpoint of the series connection of the two switching elements, wherein said change occurs during switching of at least one of the two switching elements, and by means of the known value of the at least one capacitive element.

7. The amplifier circuit according to claim 6 , wherein the current-determining circuit is configured to determine, based on a time period measured for a positive switching edge and based on a time period measured for a negative switching edge, a positive or negative output current, respectively.

8. The amplifier circuit according to claim 7 , wherein the current-determining circuit is configured to determine the difference between the time period measured for a positive switching edge and the time period measured for a negative switching edge and, based on the determined difference, to carry out a calibration of the measured switching edges.

9. The amplifier circuit according to claim 1 , wherein the current-determining circuit is configured to consider calibration values when determining the output current using the measured switching edges, said calibration values having been determined under known operating conditions of the amplifier circuit that include a clocked amplifier mode with a duty cycle of 50:50 for generating a known output current.

10. The amplifier circuit according to claim 1 , wherein the first and second voltage potentials are approximately identical with regard to an absolute value and have different polarities.

11. The amplifier circuit according to claim 1 , wherein the first switching element is a P-channel MOSFET and the second switching element is an N-channel MOSFET.

12. The amplifier circuit according to claim 1 , wherein said circuit is part of a class D amplifier circuit and the first and second switching elements are actuated with a pulse-width-modulated signal.

13. The amplifier circuit according to claim 1 , wherein the capacitive element has an attenuator configured to limit current, wherein the attenuator comprises a parallel connection of a diode and a resistor and is connected between a connection of the capacitive element and a connection of one of the switching elements.