IP Library Granted Patent US 9,104,470
Granted Patent B2
US 9,104,470 · App. 14/243,801 · Granted Aug 11, 2015

Task processor

Inventor: Naotaka Maruyama (Fujisawa, JP)
Assignee: Renesas Electronics Corporation
G06F9/461G06F9/462G06F9/4843G06F9/50
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Quick Facts
Patent No.
US 9,104,470
App. No.
14/243,801
Granted
Aug 11, 2015
Kind
B2
Abstract

A task processor includes a CPU, a save circuit, and a task control circuit. A task control circuit is provided with a task selection circuit and state storage units associated with respective tasks. When executing a predetermined system call instruction, the CPU notifies the task control circuit accordingly. When informed of the execution of a system call instruction, the task control circuit selects a task to be subsequently executed in accordance with an output from the selection circuit. When an interrupt circuit receives a high-speed interrupt request signal, the task switching circuit controls the state transition of a task by executing an interrupt handling instruction designated by the interrupt circuit.

Claims (28)

1. A task control circuit connected via a signal line to a processor which executes a task, comprising:

a state register that stores state data representing state of a task; and

a task switching circuit that controls state of a task, wherein

the task switching circuit, when a system call signal is received from the processor, reads out a parameter from an internal register of the processor by itself, performs a system call process based on the parameter, updates the state data, and writes back a return value resulting from the system call process in the internal register by itself.

2. The task control circuit according to claim 1 , wherein the task switching circuit, after writing back the return value in the internal register, reactivates the processor suspended after transmitting the system call signal.

3. The task control circuit according to claim 1 , wherein the internal register is a general-purpose register embedded in the processor.

4. The task control circuit according to claim 1 , wherein the task control circuit is connected to the processor via a plurality of signal lines, and

the task switching circuit performs the system call process corresponding to the signal line which actually transmits the system call signal, among a plurality of system call processes.

5. The task control circuit according to claim 1 , further comprising:

a plurality of state registers associated with a plurality of tasks respectively, wherein

the task switching circuit, when a task switching is required, saves context information in the save register associated with the running task.

6. The task control circuit according to claim 1 , further comprising:

a task selecting circuit that selects a task based on the state data in accordance with a predetermined condition for selection in a self-directed manner, wherein

the task selecting circuit selects a task to be executed next from among tasks in a READY state indicating that the task is executable and waits for execution, and

the task switching circuit, when a task switching is required, selects the task to be executed next in accordance with an output from the task selecting circuit at the timing of receiving the system call signal.

7. The task control circuit according to claim 1 , wherein the task switching circuit, when a task switching is required, halts the supply of a clock for the processor.

8. An auxiliary circuit which is connected to a processor via a signal line and undertakes a part of a processing from the processor, wherein

when the auxiliary circuit receives a system call signal from the processor, the auxiliary circuit reads out a parameter from an internal register of the processor by itself, performs a predetermined process, and writes back a return value resulting from the process in the internal register by itself, and after the return value is written back in the internal register, the auxiliary circuit reactivates the processor suspended after transmitting the system call signal.

9. The auxiliary circuit according to claim 8 , wherein the auxiliary circuit is connected to the processor via a plurality of signal lines and performs the process corresponding to a signal line which actually transmits the system call signal, among a plurality of processes.

10. The auxiliary circuit according to claim 8 , wherein the auxiliary circuit, when a predetermined interrupt request signal is received from outside, halts the supply of a clock for the processor.

11. The auxiliary circuit according to claim 8 , wherein the auxiliary circuit, when the control signal is received from the processor, halts the supply of a clock for the processor.

12. A task processing system, comprising:

a processor which includes a register and performs a main-process; and

an auxiliary circuit which is connected to the processor via a signal line and performs a sub-process, wherein

the processor writes down a parameter in the register and transmits a system call signal to instruct the auxiliary circuit to perform the sub-process,

the auxiliary circuit reads out the parameter from the register by itself, performs the sub-process and writes back a return value resulting from the sub-process in the register and after the return value is written back in the internal register, the auxiliary circuit reactivates the processor suspended after transmitting the system call signal, and

the processor continues the main-process based on the return value after the reactivation.

13. The task processing system according to claim 12 , wherein when the auxiliary circuit receives the system call signal from the processor, the auxiliary circuit halts the supply of a clock for the processor, writes back the return value in the register and reactivates the processor.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: KERNELON SILICON INC.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 036001/0180 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2014
From: MARUYAMA, NAOTAKA
To: NETCLEUS SYSTEMS CORPORATION
Reel/Frame 032587/0576 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2014
From: NETCLEUS SYSTEMS CORPORATION
To: KERNELON SILICON INC.
Reel/Frame 032587/0626 →
Continuity (3)
Continuation 13682633 · Nov 20, 2012
Continuation 12304769
Related Publication 20140215488A1 · Jul 31, 2014