Preventing the formation of conductive anodic filaments in a printed circuit board
View Patent ↗A conductive via and method of forming a conductive via in a multilayer printed circuit board are disclosed. A hole is drilled into a printed circuit board that is reinforced with glass fibers, wherein the hole extends between two conductive elements on different layers of the printed circuit board and cuts through a portion of the glass fibers. A tungsten nitride layer is then deposited on the walls of the hole, wherein the tungsten nitride layer has a thickness between 1.5 nanometers and 20 nanometers. A copper layer is deposited over the tungsten nitride layer, wherein the copper and tungsten nitride form a conductive via that provides an electrically conductive pathway between the two conductive elements, and wherein the tungsten nitride layer isolates the copper layer from the glass fibers.
1. A method of forming a via in a multilayer printed circuit board comprising:
drilling a hole into the printed circuit board that is reinforced with glass fibers, wherein the hole extends between two conductive elements on different layers and cuts through a portion of the glass fibers;
depositing a tungsten nitride layer on walls of the hole, wherein the tungsten nitride layer has a thickness between 1.5 nanometers and 20 nanometers; and
depositing a copper layer over the tungsten nitride layer, wherein the copper and tungsten nitride form a conductive via that provides an electrically conductive pathway between the two conductive elements, and wherein the tungsten nitride layer isolates the copper layer from the glass fibers.
2. The method of claim 1 , wherein the step of depositing a tungsten nitride layer on the walls of the hole includes atomic layer deposition of tungsten nitride.
3. The method of claim 2 , wherein the atomic layer deposition uses vapors of bis(tert-butylimido)-bis-(dimethylamido)tungsten and ammonia.
4. The method of claim 2 , further comprising:
masking the printed circuit board prior to the atomic layer deposition.
5. The method of claim 4 , further comprising:
stripping the mask after depositing the copper layer.
6. The method of claim 1 , wherein the tungsten nitride layer has a thickness between 1.5 nanometers and 10 nanometers.
7. The method of claim 1 , wherein the layer of tungsten nitride has an average thickness of between 1.5 nanometers and 20 nanometers.
8. The method of claim 1 , wherein the layer of tungsten nitride has an average thickness of between 1.5 nanometers and 10 nanometers.
9. The method of claim 1 , wherein the tungsten nitride layer is in direct contact with the at least one of the two conductive elements.
10. The method of claim 1 , wherein the via is selected from a plated through hole, a blind via, and a buried via.
11. The method of claim 1 , wherein the step of depositing a copper layer over the tungsten nitride layer includes electroplating the copper layer over the tungsten nitride layer.
12. The method of claim 11 , wherein the tungsten nitride layer functions as a seed layer during electroplating of the copper layer.
13. The method of claim 1 , wherein the printed circuit board comprises an epoxy resin.