Imaging device and operation method thereof
View Patent ↗Provided is an imaging device that can correct an output value of a pixel circuit. The imaging device includes a pixel circuit, a current detection circuit, an A/D converter, one or more memory circuit portions, and an arithmetic circuit portion. The pixel circuit includes a transistor, a charge accumulation portion, and a light-receiving element. The memory circuit portion includes a first look-up table, a second look-up table, and a region where image data output from the arithmetic circuit portion is stored. The first look-up table stores data of potentials of the charge accumulation portion, which depends on the intensity of light. The second look-up table stores output data of the transistor, which depends on the potentials of the charge accumulation portion.
1. A semiconductor device comprising:
a pixel circuit comprising a transistor and a light-receiving element, wherein a gate of the transistor is electrically connected to a charge accumulation portion and a potential of the charge accumulation portion is determined according to intensity of light received by the light-receiving element; and
a memory circuit portion comprising a first look-up table and a second look-up table,
wherein the first look-up table is configured to store data of potentials of the charge accumulation portion, which depends on the intensity of light, and
wherein the second look-up table is configured to store output data of the transistor, which depends on the potentials of the charge accumulation portion.
2. The semiconductor device according to claim 1 , further comprising a current detection circuit and an A/D converter,
wherein the output data is input to the second look-up table through the current detection circuit and the A/D converter.
3. The semiconductor device according to claim 1 ,
wherein the memory circuit portion is configured to acquire data of the second look-up table.
4. The semiconductor device according to claim 1 , further comprising a scintillator over the pixel circuit.
5. The semiconductor device according to claim 1 , wherein the light-receiving element is a photodiode.
6. The semiconductor device according to claim 1 , wherein the light-receiving element is a variable resistive element including a semiconductor layer between a pair of electrodes.
7. An operation method of the semiconductor device according to claim 1 , the operation method comprising the steps of:
acquiring data of the second look-up table;
estimating the potential of the charge accumulation portion at imaging on the basis of the output data of the transistor and the data of the second look-up table; and
estimating the intensity of the light from the estimated potential of the charge accumulation portion and the data of the first look-up table.
8. The operation method according to claim 7 , further comprising the step of:
inputting a signal regarding the estimated intensity of the light into the memory circuit portion.
9. The semiconductor device according to claim 1 , wherein the transistor includes an oxide semiconductor region.
10. A semiconductor device comprising:
a pixel circuit comprising a first transistor, a second transistor, a third transistor, and a light-receiving element, wherein a gate of the second transistor is electrically connected to a charge accumulation portion and a potential of the charge accumulation portion is determined according to intensity of light received by the light-receiving element; and
a memory circuit portion comprising a first look-up table and a second look-up table,
wherein the first look-up table is configured to store data of potentials of the charge accumulation portion, which depends on the intensity of light,
wherein the second look-up table is configured to store output data of the second transistor, which depends on the potentials of the charge accumulation portion,
wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the light-receiving element,
wherein the other of the source and the drain of the first transistor is electrically connected to the charge accumulation portion,
wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,
wherein the other of the source and the drain of the second transistor is electrically connected to a first wiring,
wherein the other of the source and the drain of the third transistor is electrically connected to a second wiring,
wherein a gate of the first transistor is electrically connected to a third wiring,
wherein a gate of the third transistor is electrically connected to a fourth wiring, and
wherein the other electrode of the light-receiving element is electrically connected to a fifth wiring.
11. The semiconductor device according to claim 10 , further comprising a current detection circuit and an A/D converter,
wherein the output data is input to the second look-up table through the current detection circuit and the A/D converter.
12. The semiconductor device according to claim 10 ,
wherein the memory circuit portion is configured to acquire data of the second look-up table.
13. The semiconductor device according to claim 10 , further comprising a scintillator over the pixel circuit.
14. The semiconductor device according to claim 10 , wherein the light-receiving element is a photodiode.
15. The semiconductor device according to claim 10 , wherein the light-receiving element is a variable resistive element including a semiconductor layer between a pair of electrodes.
16. An operation method of the semiconductor device according to claim 10 , the operation method comprising the steps of:
acquiring data of the second look-up table;
estimating the potential of the charge accumulation portion at imaging on the basis of the output data of the second transistor and the data of the second look-up table; and
estimating the intensity of the light from the estimated potential of the charge accumulation portion and the data of the first look-up table.
17. The operation method according to claim 16 , further comprising the step of:
inputting a signal regarding the estimated intensity of the light into the memory circuit portion.
18. The semiconductor device according to claim 10 , wherein each of the first transistor, the second transistor, and the third transistor includes an oxide semiconductor region.
19. A semiconductor device comprising:
a pixel circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, and a light-receiving element, wherein a gate of the second transistor is electrically connected to a charge accumulation portion and a potential of the charge accumulation portion is determined according to intensity of light received by the light-receiving element; and
a memory circuit portion comprising a first look-up table and a second look-up table,
wherein the first look-up table is configured to store data of potentials of the charge accumulation portion, which depends on the intensity of light,
wherein the second look-up table is configured to store output data of the second transistor, which depends on the potentials of the charge accumulation portion,
wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the light-receiving element,
wherein the other of the source and the drain of the first transistor is electrically connected to the charge accumulation portion,
wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,
wherein one of a source and a drain of the fourth transistor is electrically connected to the charge accumulation portion,
wherein the other of the source and the drain of the second transistor is electrically connected to a first wiring,
wherein the other of the source and the drain of the third transistor is electrically connected to a second wiring,
wherein the other of the source and the drain of the fourth transistor is electrically connected to a seventh wiring,
wherein a gate of the first transistor is electrically connected to a third wiring,
wherein a gate of the third transistor is electrically connected to a fourth wiring,
wherein a gate of the fourth transistor is electrically connected to a fifth wiring, and
wherein the other electrode of the light-receiving element is electrically connected to a sixth wiring.
20. The semiconductor device according to claim 19 , further comprising a current detection circuit and an A/D converter,
wherein the output data is input to the second look-up table through the current detection circuit and the A/D converter.
21. The semiconductor device according to claim 19 ,
wherein the memory circuit portion is configured to acquire data of the second look-up table.
22. The semiconductor device according to claim 19 , further comprising a scintillator over the pixel circuit.
23. The semiconductor device according to claim 19 , wherein the light-receiving element is a photodiode.
24. The semiconductor device according to claim 19 , wherein the light-receiving element is a variable resistive element including a semiconductor layer between a pair of electrodes.
25. An operation method of the semiconductor device according to claim 19 , the operation method comprising the steps of:
acquiring data of the second look-up table;
estimating the potential of the charge accumulation portion at imaging on the basis of the output data of the second transistor and the data of the second look-up table; and
estimating the intensity of the light from the estimated potential of the charge accumulation portion and the data of the first look-up table.
26. The operation method according to claim 25 , further comprising the step of:
inputting a signal regarding the estimated intensity of the light into the memory circuit portion.
27. The semiconductor device according to claim 19 , wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor includes an oxide semiconductor region.