Semiconductor device and method of manufacturing the same
Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes: a first conductive type semiconductor layer including a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer; a V-pit passing through at least one portion of the first upper conductive type semiconductor layer; a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pit; and an active layer interposed between the first and second conductive type semiconductor layers with the V-pit passing through the active layer. The first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and includes a V-pit generation layer comprising a starting point of the V-pit. The semiconductor device includes the V-pits having a large size and a high density to efficiently preventing damage to the semiconductor device due to electrostatic discharge.
1. A semiconductor device comprising:
a first conductive type semiconductor layer comprising a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer;
V-pits passing through at least one portion of the first upper conductive type semiconductor layer;
a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pits; and
an active layer interposed between the first and second conductive type semiconductor layers, the V-pits passing through the active layer,
wherein the first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and comprises a V-pit generation layer comprising starting points of the V-pits,
wherein the first upper conductive type semiconductor layer further comprises a super-lattice layer placed over the V-pit generation layer, and
wherein the first upper conductive type semiconductor layer further comprises a low-temperature growth doping layer interposed between the V-pit generation layer and the superlattice layer.
2. The semiconductor device according to claim 1 , wherein a lattice constant of the superlattice layer is larger than that of a low-temperature growth layer.
3. The semiconductor device according to claim 2 , wherein the V-pit generation layer and the superlattice layer include indium (In) and an In content of the V-pit generation layer is lower than that of the superlattice layer.
4. The semiconductor device according to claim 1 , wherein the V-pit generation layer includes an undoped GaN layer.
5. A semiconductor device comprising:
a first conductive type semiconductor layer comprising a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer;
V-pits passing through at least one portion of the first upper conductive type semiconductor layer;
a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pits; and
an active layer interposed between the first and second conductive type semiconductor layers, the V-pits passing through the active layer,
wherein the first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and comprises a V-pit generation layer comprising starting points of the V-pits,
wherein the V-pit generation layer includes indium (In), and
wherein the V-pit generation layer includes an AlInGaN based nitride semiconductor layer and an AlGaN based nitride semiconductor layer that are alternately stacked.
6. A semiconductor device comprising:
a first conductive type semiconductor layer comprising a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer;
V-pits passing through at least one portion of the first upper conductive type semiconductor layer;
a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pits;
an active layer interposed between the first and second conductive type semiconductor layers, the V-pits passing through the active layer;
a low-concentration doping layer interposed between the V-pit generation layer and the active layer; and
a high-concentration barrier layer interposed between the low-concentration doping layer and the active layer and doped with Si,
wherein the first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and comprises a V-pit generation layer comprising starting points of the V-pits.
7. The semiconductor device according to claim 6 , wherein a doping concentration of the low-concentration doping layer is lower than those of the high-concentration barrier layer and the first lower conductive type semiconductor layer to form a capacitor.
8. The semiconductor device according to claim 7 , wherein a doping concentration of the low-concentration superlattice layer is equal to or lower than that of the low-concentration doping layer.
9. The semiconductor device according to claim 6 , further comprising:
a low-concentration superlattice layer interposed between the low-concentration doping layer and the high-concentration barrier layer.
10. The semiconductor device according to claim 6 , wherein the V-pits cross the high-concentration barrier layer such that the high-concentration barrier layer has a three-dimensional shape.
11. A semiconductor device comprising:
a first conductive type semiconductor layer comprising a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer;
V-pits passing through at least one portion of the first upper conductive type semiconductor layer;
a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pits;
an active layer interposed between the first and second conductive type semiconductor layers, the V-pits passing through the active layer; and
a high-resistance filling layer interposed between the active layer and the second conductive type semiconductor layer and filling the V-pits,
wherein the first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and comprises a V-pit generation layer comprising starting points of the V-pits.
12. The semiconductor device according to claim 11 , wherein the high-resistance filling layer includes an undoped layer and a doping layer that are alternately stacked such that holes are injected into the active layer through inner inclined surfaces of the V-pits.
13. The semiconductor device according to claim 12 , wherein the undoped layer includes a uAlGaN layer and the doping layer includes a p-type nitride semiconductor layer.
14. The semiconductor device according to claim 12 , wherein the undoped layer includes a uGaN layer and the doping layer includes a p-type nitride semiconductor layer.
15. The semiconductor device according to claim 12 , wherein the undoped layer and the doping layer are alternately repetitively stacked.
16. The semiconductor device according to claim 11 , further comprising:
an electron blocking layer interposed between the active layer and the high-resistance filling layer and filling at least one portion of the V-pits,
wherein the high-resistance filling layer fills the rest of the V-pits.