Fabrication method of inverted solar cells

1. A fabrication method for an inverted solar cell, comprising:

(1) providing a growth substrate;

(2) depositing a SiO 2 mask layer over the surface of the growth substrate to form a patterned substrate;

(3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer surrounds the entire SiO 2 mask layer;

(4) forming a buffer layer over the sacrificial layer via epitaxial growth;

(5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth;

(6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate;

(7) selectively etching the SiO 2 mask layer by wet etching; and

(8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

2. The fabrication method according to claim 1 , wherein the material of the growth substrate in step (1) is Ge or GaAs.

3. The fabrication method according to claim 1 , wherein the pattern of the SiO 2 mask layer in step (2) comprises at least one of a single-direction parallel pattern, a crisscrossing pattern, or an inter-crossing pattern.

4. The fabrication method according to claim 1 , wherein the material of the sacrificial layer in step (3) is InGaP.

5. The fabrication method according to claim 1 , wherein the material of the sacrificial layer in step (3) is AlGaAs.

6. The fabrication method according to claim 1 , wherein the supporting substrate in step (6) is a Si wafer.

7. The fabrication method claim 1 , wherein the step (6) comprises:

depositing a first metal bonding layer over the semiconductor material layer sequence of the inverted solar cell;

providing a Si wafer as the supporting substrate and forming a cover layer of high doping level over the surface thereof;

depositing a second metal bonding layer over the cover layer;

bonding the semiconductor material layer sequence of inverted solar cell with the Si wafer;

wherein the material of the cover layer is InGaAs or GaAs.

8. The fabrication method according to claim 1 , wherein hydrofluoric acid is used to selectively etch the SiO 2 mask layer in step (7).

9. The fabrication method according to claim 1 , wherein ammonium fluoride is used to selectively etch the SiO 2 mask layer in step (7).

10. The fabrication method according to claim 1 , wherein a selective etching solution of hydrochloric acid and phosphoric acid at a volumetric ratio of 1:2 is used to selectively etch the sacrificial layer in step (8).

11. The fabrication method according to claim 1 , further comprising: cleaning the patterned substrate and disposing the patterned substrate into a MOCVD reaction chamber.

12. The fabrication method according to claim 11 , wherein a pressure of the MOCVD chamber is controlled at about 300 Torr.

13. The fabrication method according to claim 12 , wherein an epitaxial growth rate is controlled to be about 1 Å/s.

14. The fabrication method according to claim 13 , further comprising: baking the patterned substrate under a temperature of about 750° C. for about 10 minutes.

15. The fabrication method according to claim 14 , further comprising: lowering the temperature to about 650° C.

16. The fabrication method according to claim 15 , further comprising: forming a Ga 0.5 In 0.5 P sacrificial layer of about 150 nm thickness using a lateral epitaxial growth process.

17. The fabrication method according to claim 16 , wherein the Ga 0.5 In 0.5 P sacrificial layer encloses the entire SiO 2 mask layer.

18. The fabrication method according to claim 17 , further comprising: adjusting the pressure of MOCVD reaction chamber to about 30 Torr.

19. The fabrication method according to claim 18 , further comprising: controlling a molar flow rate of V-III group reaction source to be about 40.

20. The fabrication method according to claim 19 , further comprising: growing a GaAs buffer layer over the Ga 0.5 In 0.5 P sacrificial layer.