IP Library Granted Patent US 9,367,658
Granted Patent B2
US 9,367,658 · App. 13/166,565 · Granted Jun 14, 2016

Method and apparatus for designing and generating a stream processor

Inventors: Oliver Pell (London, GB); James Huggett (London, GB)
Assignee: Maxeler Technologies Ltd.
G06F17/505G06F2217/68
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Quick Facts
Patent No.
US 9,367,658
App. No.
13/166,565
Granted
Jun 14, 2016
Kind
B2
Abstract

Embodiments of the invention provide a method and apparatus for generating programmable logic for a hardware accelerator, the method comprising: generating a graph of nodes representing the programmable logic to be implemented in hardware; identifying nodes within the graph that affect external flow control of the programmable logic; retaining the identified nodes and removing or replacing all nodes which do not affect external flow control of the programmable logic in a modified graph; and simulating the modified graph or building a corresponding circuit of the retained nodes.

Claims (18)

1. A method of generating a stream processor, the method comprising:

generating a graph of nodes representing the stream processor to be implemented in hardware;

identifying nodes within the graph that affect external flow control of the stream processor;

retaining the identified nodes and removing or replacing all nodes that do not affect external flow control of the stream processor in a modified graph;

simulating, by a processor, the modified graph or building a corresponding circuit of the retained nodes;

traversing the graph in reverse order from outputs to inputs and, for each node, determining in sequence if it affects external flow control; and

once the graph has been simulated or a corresponding circuit built of nodes that do affect external flow control, debugging any identified flow control bugs independent of the data flow through the stream processor.

2. The method according to claim 1 , wherein the determination as to whether or not the node affects external flow control includes identifying it if it is a control signal to one or more inputs or outputs.

3. The method according to claim 2 , comprising categorizing each node into a class selected from the following:

a. data path nodes comprising the processing to be performed on data streaming through the stream processor;

b. control path nodes comprising nodes that affect control within the graph; and

c. control path nodes that affect external flow to or from the graph.

4. The method according to claim 1 , comprising categorizing each node into a class selected from the following:

a. data path nodes comprising the processing to be performed on data streaming through the stream processor;

b. control path nodes comprising nodes that affect control within the graph; and

c. control path nodes that affect external flow to or from the graph.

5. The method according to claim 4 , in which nodes in classes a and b are removed from the graph.

6. The method according to claim 1 further comprising automatically generating the graph of nodes from a high level description of the stream processor to be implemented.

Assignments (2)
CHANGE OF NAME Recorded Jul 8, 2025
From: MAXELER TECHNOLOGIES LIMITED
To: GROQ UK LIMITED
Reel/Frame 071625/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: PELL, OLIVER; HUGGETT, JAMES
To: MAXELER TECHNOLOGIES LTD.
Reel/Frame 026594/0028 →
Continuity (1)
Related Publication 20120330638A1 · Dec 27, 2012