IP Library Granted Patent US 9,401,447
Granted Patent B2
US 9,401,447 · App. 14/885,056 · Granted Jul 26, 2016

Semiconductor light-receiving element and method for manufacturing same

Inventor: Shigekazu Okumura (Setagaya, JP)
Assignee: FUJITSU LIMITED
H01L31/105G02B6/1228H01L31/028H01L31/02327H01L31/035281H01L31/109H01L31/1804H01L31/1864H04J14/02
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Quick Facts
Patent No.
US 9,401,447
App. No.
14/885,056
Granted
Jul 26, 2016
Kind
B2
Abstract

The present invention pertains to a semiconductor light-receiving element and a method for manufacturing the same, enabling operation in a wide wavelength bandwidth and achieving fast response and high response efficiency. A PIN type photodiode made by sequentially layering on top of the substrate a Si layer of a first conductivity type, a non-doped Ge layer and a Ge layer of a second conductivity type that is the opposite type of the first conductivity type and a Ge current-blocking mechanism is provided in at least part of the periphery of the PIN type photodiode.

Claims (17)

1. A semiconductor light-receiving element comprising:

a substrate of which a surface is a single crystal Si layer;

a PIN type photodiode made by sequentially layering on top of the substrate a Si layer of a first conductivity type, a non-doped Ge layer and a Ge layer of a second conductivity type that is the opposite type of the first conductivity type;

a Ge current blocking mechanism provided in at least a portion in the periphery of the layer structure made of the non-doped Ge layer and the Ge layer of the second conductivity type;

a contact electrode for the second conductivity type provided on the Ge layer of the second conductivity type; and

a contact electrode for the first conductivity type provided in the Si layer of the first conductivity type.

2. The semiconductor light-receiving element according to claim 1 ,

wherein the Ge current blocking mechanism has a structure where a Ge layer of the second conductivity type and a Ge layer of the first conductivity type are layered on top of each other starting from the substrate side, and

a thyristor structure made of a Ge layer of the second conductivity type, a Ge layer of the first conductivity type, a Ge layer of the second conductivity type and a Si layer of the first conductivity type is formed between the contact electrode for the second conductivity type and the contact electrode for the first conductivity type.

3. The semiconductor light-receiving element according to claim 2 ,

wherein the PIN type photodiode has a rectangular parallelepiped form where three sides out of four sides make contact with the Ge current blocking mechanism.

4. The semiconductor light-receiving element according to claim 3 ,

wherein a single crystal Si core layer in stripe for is connected to the Si layer of the first conductivity type via a tapered waveguide on the one side that does not make contact with the Ge current blocking mechanism.

5. The semiconductor light-receiving element according to claim 1 ,

wherein all of the sides of the PIN type photodiode are surrounded by the Ge current blocking mechanism and a top surface of the PIN type photodiode is a surface through which light enters.

6. The semiconductor light-receiving element according to claim 1 ,

wherein the substrate is an SOI substrate where a single crystal Si layer is provided on a single crystal Si substrate with a SiO 2 film in between.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: OKUMURA, SHIGEKAZU
To: FUJITSU LIMITED
Reel/Frame 036992/0125 →
Continuity (2)
Continuation PCTJP2013061625 · Apr 19, 2013
Related Publication 20160043262A1 · Feb 11, 2016