Transmission line for 3D integrated circuit

1. A semiconductor transmission line substructure comprising:

a first semiconductor substrate;

a first signal line over said first semiconductor substrate;

a first ground line over said first semiconductor substrate;

a second semiconductor substrate over said first semiconductor substrate, wherein each of said first semiconductor substrate, said first signal line, said first ground line and said second semiconductor substrate are vertically spaced apart from one another, and

a second ground line over said first semiconductor substrate, wherein said second semiconductor substrate is between said first and second ground lines.

2. The semiconductor transmission line structure as in claim 1 , wherein a lateral width of said first ground line is at least two times a lateral width of said first signal line.

3. The semiconductor transmission line structure as in claim 1 , wherein said first semiconductor substrate comprises crystalline silicon.

4. The semiconductor transmission line structure as in claim 1 , wherein said second semiconductor substrate comprises silicon.

5. The semiconductor transmission line structure as in claim 1 , wherein said second semiconductor substrate is between said first signal line and said first ground line.

6. The semiconductor transmission line structure as in claim 1 , wherein said second semiconductor substrate is over said first signal line and said first ground line.

7. The semiconductor transmission line structure as in claim 1 , wherein a second signal line and said second ground line are over said second semiconductor substrate.

8. The semiconductor transmission line structure as in claim 1 , wherein said first signal line, said first ground line and said second semiconductor substrate are separated from each other by at least one electrically insulating layer.

9. The semiconductor transmission line structure as in claim 1 , further comprising:

a second signal line, wherein said second semiconductor substrate, said first ground line, and said second ground line are between said first and second signal lines.

10. The semiconductor transmission line structure as in claim 9 , wherein said first signal line and said second signal line are electrically coupled to each other.

11. The semiconductor transmission line structure as in claim 10 , wherein said first signal line comprises a plurality of first signal line segments, wherein said first signal line segments are separated from and co-planar with one another, wherein said first signal line segments and said second signal line are electrically coupled in series.

12. The semiconductor transmission line structure as in claim 11 , wherein said second signal line comprises a plurality of second signal line segments, wherein said second signal line segments are separated from and co-planar with one another, wherein each first signal line segment is electrically coupled to a second signal line segment and said first and second signal line segments are electrically coupled in series.

13. The semiconductor transmission line structure as in claim 1 ,

wherein said first ground line is between said first signal line and said second semiconductor substrate.

14. The semiconductor transmission line structure as in claim 13 , wherein said first ground line and said second ground line are electrically coupled to each other.

15. The semiconductor transmission line structure as in claim 14 , wherein said first ground line comprises a plurality of first ground line segments, wherein said first ground line segments are separated from and co-planar with one another, wherein said first ground line segments and said second ground line are electrically coupled in series.

16. A semiconductor transmission line substructure comprising:

a first semiconductor substrate;

a first signal line over said first semiconductor substrate;

a first ground line over said first semiconductor substrate;

a second semiconductor substrate over said first semiconductor substrate;

a second signal line over said first semiconductor substrate; and

a second ground line over said first semiconductor substrate, wherein each of said first signal line, said first ground line, said second signal line, said second ground line, and said second semiconductor substrate are vertically spaced apart from one another,

wherein said second semiconductor substrate is between said first and second signal lines,

wherein said second semiconductor substrate is between said first and second ground lines, and

wherein said first and second signal lines are electrically coupled or said first and second ground lines are electrically coupled.

17. A method of transmitting a transmission signal, comprising:

providing a semiconductor transmission line substructure comprising:

a first semiconductor substrate,

a first signal line over said first semiconductor substrate,

a first ground line over said first semiconductor substrate, and

a second semiconductor substrate over said first semiconductor substrate, wherein each of said first signal line, said first ground line and said second semiconductor substrate are vertically spaced apart from one another; and

a second ground line over said second semiconductor substrate, wherein said second semiconductor substrate is between said first and second ground lines; and

transmitting a high frequency signal over the first signal line.

18. The method as in claim 17 , further comprising modulating said signal by changing an effective width of said first signal line, said first ground line or both.

19. The method as in claim 17 , wherein said first signal line comprises a plurality of first signal line segments, wherein said signal ground line segments are separated from and co-planar with one another, and

wherein said method further comprising changing an effective width of the signal line by actuating a switch electrically coupling two adjacent signal line segments.

20. The method as in claim 19 , wherein said switch comprises at least one transistor formed in the second semiconductor substrate.