IP Library Granted Patent US 9,521,094
Granted Patent B2
US 9,521,094 · App. 14/086,974 · Granted Dec 13, 2016

Network switch for power saving

Inventor: Chao-Ying Chiu (New Taipei, TW)
Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
H04L49/351H04L12/4641
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Quick Facts
Patent No.
US 9,521,094
App. No.
14/086,974
Granted
Dec 13, 2016
Kind
B2
Abstract

A network switch includes a plurality of physical layer (PHY) chips and a processor. Each of the PHY chips includes a plurality of network interfaces configured to connect to external network devices. The processor includes a port information (PI) table configured to record a working state of each PHY chip and to record used network interfaces of each PHY chip. When there are one or more PHY chips which network interfaces are all not used, the processor controls the one or more PHY chips to work in a sleep state.

Claims (15)

1. A network switch, comprising:

a plurality of physical layer (PHY) chips, each of the plurality of PHY chips comprising a plurality of network interfaces configured to connect to external network devices; and

a processor comprising a port information (PI) table configured to record a working state of the each of the plurality of the PHY chips and to record used network interfaces of the each of the plurality of the PHY chips, the processor detecting if there is one or more PHY chip having network interfaces that are all not used according to the PI table, and controlling the detected one or more PHY chip with network interfaces that are all not used to work in a sleep state;

wherein when the each of the plurality of the PHY chips which have one or more network interface is used, the processor detects whether a number of the all not used network interfaces of the plurality of the PHY chips exceeds a predetermined value, and outputs a corresponding notification, when it is detected that the number of the all not used network interfaces of the plurality of the PHY chips exceeds a predetermined value.

2. The network switch according to claim 1 , wherein the each of the plurality of the PHY chips has a chip identification (ID) and each of the plurality of network interfaces has an interface ID.

3. The network switch according to claim 2 , wherein when an external network device is connected to or disconnected from a network interface of a corresponding PHY chip, the corresponding PHY chip sends a notification message to the processor, and the processor updates the PI table according to the notification message.

4. The network switch according to claim 3 , wherein the notification message comprises the a port ID of the network interface of the corresponding PHY chip and the chip ID of the corresponding PHY chip.

5. The network switch according to claim 1 , wherein the notification is a text message sent to a control device connected to a predetermined network interface of the plurality of the PHY chips, and the text message is displayed on a graphic user interface (GUI) of the control device.

6. The network switch according to claim 2 , wherein the PI table comprises a chip ID column that records the chip ID of the each of the plurality of the PHY chips, a network interface column that records the used network interfaces of the each of the plurality of the PHY chips, and a chip state column that records the working state of each of the PHY chips.

7. The network switch according to claim 6 , wherein the working state of the each of the plurality of the PHY chips comprises an active state and the sleep state; when the PHY chip is working in the active state, all functions of the PHY chip are enabled; when the PHY chip is working in the sleep state, a portion of functions or all of functions of the PHY chip are disabled to decrease energy waste.

8. The network switch according to claim 1 , wherein each of the plurality of network interfaces comprises a light indicator, the processor controls the light indicators of corresponding network interfaces to emit predetermined color of light which is an indication of switching the external network devices from the corresponding network interfaces to other network interfaces.

9. The network switch according to claim 8 , wherein the light indicator is a light emitting diode (LED).

10. The network switch according to claim 1 , wherein the predetermined value is equal to or greater than a number of the network interfaces of the each of the plurality of the PHY chips.

11. The network switch according to claim 1 , wherein when an external network device is connected to a network interface of a PHY chip which is in the sleep state, the processor activates the PHY chip from the sleep state.

12. The network switch according to claim 11 , wherein the processor further updates information of the PI table when the PHY chip is activated from the sleep state.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2018
From: HON HAI PRECISION INDUSTRY CO., LTD.
To: CLOUD NETWORK TECHNOLOGY SINGAPORE PTE. LTD.
Reel/Frame 045171/0306 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2014
From: CHIU, CHAO-YING
To: HON HAI PRECISION INDUSTRY CO., LTD.
Reel/Frame 033406/0364 →
Priority Claims (1)
TW 101148549 A · Dec 20, 2012 · national
Continuity (1)
Related Publication 20140177642A1 · Jun 26, 2014