IP Library Granted Patent US 9,523,722
Granted Patent B2
US 9,523,722 · App. 14/293,820 · Granted Dec 20, 2016

Method and apparatus for supply voltage glitch detection in a monolithic integrated circuit device

Inventors: Nir Tasher (Tel-Mond, IL); Valery Teper (Petah-Tikva, IL); Dennis Chin Cheng (Palo Alto, CA); Koying Huang (San Jose, CA)
Assignee: WINBOND ELECTRONICS CORPORATION
G01R19/16552G01R19/16576G06F1/28G06F1/30
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Quick Facts
Patent No.
US 9,523,722
App. No.
14/293,820
Granted
Dec 20, 2016
Kind
B2
Abstract

A monolithic integrated circuit device may include a supply voltage glitch detector for detecting improper supply voltage conditions. Advantageously, the detection threshold of the supply voltage glitch detector is adaptively set based on the mode of operation of the device or a particular part of the device, which is internally known to the device based on certain inputs received by the device, such as commands, interrupts, control signals, and so forth.

Claims (44)

1. A method for detecting a glitch in supply voltage provided to a monolithic integrated circuit device having various modes of operation, comprising:

operating the device in one of a read, erase or program mode of operation;

monitoring a mode of operation of the integrated circuit, to determine whether the integrated circuit is currently active in the read, erase or program mode of operation;

selecting a configurable glitch detection parameter responsively to the currently active mode of operation;

monitoring a supply voltage of the integrated circuit by a glitch detector of the integrated circuit; and

providing by the glitch detector an alarm signal when the monitored supply voltage violates a glitch detection threshold in accordance with the selected glitch detection parameter.

2. The method of claim 1 wherein

providing an alarm signal when the monitored supply voltage violates a glitch detection threshold comprises providing an alarm when the monitored supply voltage has a minimum voltage amplitude less than the glitch detection threshold.

3. The method of claim 1 wherein

selecting a configurable glitch detection parameter comprises selecting a minimum duration of a glitch for which an alarm is provided and wherein providing the alarm signal comprises providing the alarm signal when the monitored supply voltage violates the glitch detection threshold for at least the minimum duration.

4. The method of claim 1 wherein

providing an alarm signal when the monitored supply voltage violates a glitch detection threshold comprises providing an alarm when the monitored supply voltage has a maximum voltage amplitude greater than the glitch detection threshold.

5. A method for detecting a glitch in supply voltage provided to a monolithic integrated circuit device having various modes of operation, comprising:

operating the device in one of a read, erase or program mode of operation;

monitoring a mode of operation of the integrated circuit, to determine whether the integrated circuit is currently active in the read, erase or program mode of operation;

selecting a configurable low detection threshold as either a first low detection threshold associated with the read mode of operation, or as a second low detection threshold associated with the erase and program modes of operation, responsively to the currently active mode of operation;

selecting a configurable high detection threshold as either a first high detection threshold associated with the read mode of operation, or as a second high detection threshold associated with the erase and program modes of operation, responsively to the currently active mode of operation; and

monitoring the supply voltage of the integrated circuit by a glitch detector of the integrated circuit and providing by the glitch detector an alarm signal when the monitored supply voltage violates either the selected configurable low detection threshold, or the selected configurable high detection threshold.

6. The method of claim 5 wherein:

the first low detection threshold is approximately 1.4V;

the second low detection threshold is approximately 1.3V;

the first high detection threshold is approximately 2.05V; and

the second high detection threshold is approximately 2.15V.

7. A monolithic integrated circuit device having various modes of operation, comprising:

a plurality of functional circuits configured to operate respectively at the various modes of operation that include read mode, erase mode, and program mode;

control logic configured to provide a control signal indicative of whether the integrated circuit is currently active in anyone of the read, erase or program mode of operation; and

a supply voltage threshold detection circuit coupled to the control logic and configurable in response to the control signal to select a configurable glitch detection parameter, to monitor a supply voltage of the integrated circuit and to provide an alarm on an output thereof when the supply voltage violates a glitch detection threshold in accordance with the selected glitch detection parameter.

8. The monolithic integrated circuit device of claim 7 , wherein the detection circuit is configured monitor the supply voltage and provide an alarm signal if the supply voltage goes below a

low detection threshold or goes above a high detection threshold.

9. The monolithic integrated circuit device of claim 8 , wherein the supply voltage threshold detection circuit comprises:

a low threshold detector having a CMOS reference circuit controlled by the control signal; and

a high threshold detector having a band gap reference circuit controlled by the control signal.

10. The monolithic integrated circuit device of claim 9 , wherein the supply voltage threshold detection circuit further comprises a power-on instability corrective circuit having an input coupled to an output of the low threshold detector, and an output coupled to the high threshold detector and configured to block an alarm signal from the high threshold detector during power-up of the monolithic integrated circuit.

11. The monolithic integrated circuit device of claim 7 , wherein the supply voltage threshold detection circuit comprises:

a differential amplifier having an output, a bias input, and a variable reference voltage input responsive to the control signal; and

a latch coupled to the output of the differential amplifier.

12. The monolithic integrated circuit device of claim 11 , further comprising a CMOS reference circuit responsive to the control signal and having an output coupled to the variable reference voltage input of the differential amplifier.

13. The monolithic integrated circuit device of claim 11 , further comprising a band gap reference circuit responsive to the control signal and having an output coupled to the variable reference voltage input of the differential amplifier.

14. The monolithic integrated circuit device of claim 7 , wherein the glitch detection parameter comprises an upper glitch detection threshold selected in response to the control signal and wherein the integrated circuit is configured to provide an alarm when the supply voltage is above the selected glitch detection parameter.

15. The monolithic integrated circuit device of claim 7 , wherein the glitch detection parameter comprises a glitch detection duration selected in response to the control signal and wherein the integrated circuit is configured to provide an alarm when the supply voltage violates the glitch detection threshold for longer than the glitch detection parameter.

16. The monolithic integrated circuit device of claim 7 , wherein the control logic is configured to provide a control signal indicative of whether the integrated circuit is in a read mode, a program mode or an erase mode and wherein the glitch detection parameter is selected by the supply voltage threshold detection circuit responsively to the mode indicated by the control signal provided by the control logic.

17. The method of claim 1 , wherein selecting the glitch detection parameter comprises selecting a first glitch detection parameter when the integrated circuit is in the read mode and selecting a second, different, glitch detection parameter, when the integrated circuit is in an erase mode.

18. The method of claim 5 , further comprising selecting a detection duration threshold, responsively to the currently active mode of operation, and wherein providing the alarm signal comprises providing the alarm signal when either the selected configurable low detection threshold or the selected configurable high detection threshold is violated for at least the duration of the selected detection duration threshold.

19. The method of claim 18 , wherein selecting the detection duration threshold comprises selecting from a first duration of about 10 nS and a second duration of about 20 nS.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: CHENG, DENNIS CHIN; HUANG, KOYING
To: WINBOND ELECTRONICS CORPORATION
Reel/Frame 033011/0573 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: TASHER, NIR
To: WINBOND ELECTRONICS CORPORATION
Reel/Frame 033011/0584 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: TEPER, VALERY
To: WINBOND ELECTRONICS CORPORATION
Reel/Frame 033011/0607 →
Continuity (1)
Related Publication 20150346246A1 · Dec 3, 2015