IP Library Granted Patent US 9,536,595
Granted Patent B2
US 9,536,595 · App. 15/010,300 · Granted Jan 3, 2017

Systems and methods for reducing standby power in floating body memory devices

Inventors: Benjamin S. Louie (Fremont, CA); Yuniarto Widjaja (San Jose, CA)
Assignee: Zeno Semiconductor, Inc.
G11C11/417G11C5/148G11C11/412
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Quick Facts
Patent No.
US 9,536,595
App. No.
15/010,300
Granted
Jan 3, 2017
Kind
B2
Abstract

Methods, devices, arrays and systems for reducing standby power for a floating body memory array. One method includes counting bits of data before data enters the array, wherein the counting includes counting at least one of: a total number of bits at state 1 and a total number of all bits; a total number of bits at state 0 and the total number of all bits; or the total number of bits at state 1 and the total number of bits at state 0. This method further includes detecting whether the total number of bits at state 1 is greater than the total number of bits at state 0; setting an inversion bit when the total number of bits at state 1 is greater than the total number of bits at state 0; and inverting contents of all the bits of data before writing the bits of data to the memory array when the inversion bit has been set.

Claims (5)

1. A method of reducing standby power for a floating body memory array having a plurality of floating body memory cells configured with DNWell nodes that can be powered to maintain a high potential in the floating body by a vertical bipolar holding mechanism, said method comprising:

performing at least one of: periodically pulsing a source line of the array; periodically pulsing a bit line of the array; periodically floating the source line; or periodically floating the bit line;

wherein said periodically pulsing comprises cyclically applying a pulse of positive voltage to said source line or bit line to turn off the vertical bipolar holding mechanism; and removing said positive voltage between said pulses to turn on said vertical bipolar holding mechanism.

2. The method of claim 1 , further comprising tracking voltage of at least one floating body of at least one of said floating body memory cells using at least one reference cell to ensure that the vertical bipolar holding mechanism is restored before said at least one floating body previously set at state 1 drops below a predetermined transition voltage level.

3. The method of claim 2 , wherein a first level detector is provided to detect a high floating body potential by the reference cell and a second level detector is provided to detect a low floating body potential by the reference cell.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF SIGNATURE BY 1ST INVENTOR PREVIOUSLY RECORDED AT REEL: 038162 FRAME: 0200. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 15, 2019
From: LOUIE, BENJAMIN S.; WIDJAJA, YUNIARTO
To: ZENO SEMICONDUCTOR, INC.
Reel/Frame 049759/0150 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2016
From: LOUIE, BENJAMIN S.; WIDJAJA, YUNIARTO
To: ZENO SEMICONDUCTOR, INC.
Reel/Frame 038162/0200 →
Continuity (4)
Division 14328633 · Jul 10, 2014
Provisional Application 61844832 · Jul 10, 2013
Provisional Application 61846720 · Jul 16, 2013
Related Publication 20160148674A1 · May 26, 2016