Semiconductor device

1. A semiconductor device, comprising:

a semiconductor substrate including a first region and a second region adjacent to the first region, wherein

a first line-and-space pattern extending along the semiconductor substrate in a first direction is disposed in the first region,

a dummy pattern is disposed in the second region and has a surface area per unit area that is greater than a surface area of per unit area of the first line-and-space pattern,

the dummy pattern includes a second line-and-space pattern that extends along the semiconductor substrate in the first direction,

the second line-and-space pattern having a line width in a second direction along the semiconductor substrate and perpendicular to the first direction that is equal to a line width in the second direction of the first line-and-space pattern, and

a first spacing distance in the second direction between lines of the first line-and-space pattern is greater than a second spacing distance in the second direction between lines of the second line-and-space pattern.

2. The semiconductor device according to claim 1 , wherein lines of the second line-and-space pattern are comprised of a plurality of line portions, the line portions within each line of the second line-and-space pattern being spaced from each other at a distance along the first direction that is less than the first spacing distance.

3. The semiconductor device according to claim 1 , wherein a memory cell transistor is disposed in the first region.

4. A semiconductor device, comprising:

a first region that is on a semiconductor substrate, the first region including a first line-and-space pattern extending along the semiconductor substrate in a first direction disposed therein; and

a second region on the semiconductor substrate, the second region being adjacent to the first region and including a second line-and-space pattern, wherein

each line in the first line-and-space pattern has a first line width along the semiconductor substrate in a second direction perpendicular to the first direction,

each space in the second direction between adjacent lines in the first line-and-space pattern is equal to a first spacing distance,

each line in the second line-and-space pattern has the first line width along the semiconductor substrate in the second direction,

each space in the second direction between adjacent lines in the second line-and-space pattern is equal to a second spacing distance, and

the first spacing distance is greater than the second spacing distance.

5. The semiconductor device of claim 4 , wherein the first region includes a memory cell transistor and the second region is a dummy pattern region.

6. The semiconductor device of claim 4 , wherein the lines of the first line-and-space pattern are word lines of a memory cell transistor array.