Photodiode and method of manufacturing the same, and X-ray detector and method of manufacturing the same

1. A PIN photodiode for an X-ray detector, the PIN photodiode comprising a first doped layer, a second doped layer and an intrinsic layer between the first and second doped layers stacked in order, and the first doped layer being provided on a source/drain electrode layer of a thin film transistor of the X-ray detector, wherein

a heavily-doped region is provided in the second doped layer, has a doping concentration larger than that of the second doped layer, and is electrically connected with a cathode of the PIN photodiode.

2. The PIN photodiode according to claim 1 , wherein the heavily-doped region is arranged in a grid shape, and the cathode is arranged in a grid shape matching that of the heavily-doped region.

3. The PIN photodiode according to claim 1 , wherein a surface of the second doped layer facing the cathode is provided with a textured structure.

4. The PIN photodiode according to claim 3 , wherein the textured structure is formed by isotropically etching the surface of the second doped layer by using a dry etching process.

5. The PIN photodiode according to claim 1 , wherein:

the first doped layer is an n+ α-Si: H layer, the intrinsic layer is an α-Si: H layer, the second doped layer is a p+ α-Si: H layer, and the heavily-doped region is a p++ α-Si: H layer; or

the second doped layer is an n+ α-Si: H layer, the intrinsic layer is an α-Si: H layer, the first doped layer is a p+ α-Si: H layer, and the heavily-doped region is an n++ α-Si: H layer.

6. The PIN photodiode according to claim 1 , wherein the heavily-doped region is formed through an ion implantation process.

7. The PIN photodiode according to claim 1 , wherein the heavily-doped region has a shape of a groove, the groove is formed in the intrinsic layer and the second doped layer, and a portion of the cathode is arranged within the groove.

8. The PIN photodiode according to claim 6 , wherein

B2H6 or PH3 is used as an ion source for doping in the ion implantation process.

9. A method of manufacturing the PIN photodiode according to claim 1 , comprising steps of:

depositing a plurality of layers of the PIN photodiode on a side of the source/drain electrode layer away from an active layer of the thin film transistor and patterning the plurality of layers, the plurality of layers comprising a first doped layer, a second doped layer and an intrinsic layer between the first and second doped layers, the first doped layer being providing on the source/drain electrode layer;

forming a heavily-doped region, the heavily-doped region contacting the second doped layer;

performing annealing activation treatment so as to activate doped ions;

depositing a passivation layer to at least cover the second doped layer, and patterning the passivation layer so as to form a through hole at a position in the passivation layer corresponding to the heavily-doped region; and

depositing a cathode material layer on the passivation layer above the second doped layer and patterning the cathode material layer so as to form a cathode, a portion of the cathode being arranged within the through hole so that the cathode electrically contacts or is electrically connected with the heavily-doped region.

10. The method according to claim 9 , wherein the step of forming a heavily-doped region comprises:

heavily doping the second doped layer by using an ion implantation process so that the heavily-doped region is formed in the second doped layer.

11. The method according to claim 9 , wherein the step of forming a heavily-doped region comprises:

patterning the intrinsic layer and the second doped layer so as to form a groove penetrating through the intrinsic layer and being partially located in the second doped layer; and

heavily doping the groove by using an ion implantation process so as to form the heavily-doped region in a form of groove.

12. The method according to claim 9 , wherein the step of patterning the plurality of layers of the PIN photodiode comprises coating, developing and postbaking photoresist and performing a dry etching process so as to pattern the plurality of layers, and stripping the photoresist.

13. The method according to claim 9 , wherein the first doped layer and the second doped layer of the PIN photodiode are formed respectively by using an ion implantation process.

14. The method according to claim 13 , wherein

an α-Si: H layer is deposited through a PECVD process, and is doped by using B2H6 or PH3 as an ion source so as to form a P+ α-Si: H layer or an N+ α-Si: H layer as the first doped layer; and

then an α-Si: H layer is deposited through a PECVD process, and is partially doped by using PH3 or B2H6 as an ion source so as to form an N+ α-Si: H layer or a P+ α-Si: H layer as the second doped layer with an undoped portion of the α-Si: H layer being used as the intrinsic layer.

15. The method according to claim 9 , wherein thicknesses of the first doped layer and the second doped layer are 200 Ř700 Å respectively, and a thickness of the intrinsic layer is 5000 Ř15000 Å.

16. An X-ray detector, comprising:

a substrate;

a thin film transistor formed on the substrate, the thin film transistor comprising a gate, a gate insulation layer, an active layer and a source/drain electrode layer arranged in stack in order on the substrate;

the PIN photodiode according to claim 1 ; and

a scintillant material layer at least covering the PIN photodiode.

17. A method of manufacturing the X-ray detector of claim 16 , comprising:

forming the thin film transistor on the substrate;

forming the PIN photodiode by the method of claim 9 ; and

forming the scintillant material layer to at least cover the PIN photodiode and performing a packaging process.

18. The PIN photodiode according to claim 2 , wherein a surface of the second doped layer facing the cathode is provided with a textured structure.

19. The PIN photodiode according to claim 2 , wherein:

the heavily-doped region has a shape of a groove, the groove is formed in the intrinsic layer and the second doped layer, and a portion of the cathode is arranged within the groove.

20. The method according to claim 9 , wherein at least one of the heavily-doped region and the cathode is formed as a grid shape.