IP Library Granted Patent US 9,727,097
Granted Patent B2
US 9,727,097 · App. 15/062,447 · Granted Aug 8, 2017

Length-adjustable storage device

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Quick Facts
Patent No.
US 9,727,097
App. No.
15/062,447
Granted
Aug 8, 2017
Kind
B2
Abstract

A storage device includes a base board and a memory chip package. The base board includes, on a first edge, a connector that is connectable to a host device and through which the storage device communicates with the host device, on a second edge that is opposite to the first edge, a first engaging portion by which the base board is fixable to the host device, and in an intermediate portion that is located between the first edge and the second edge, a second engaging portion by which the base board is fixable to the host device when an end portion of the base board between the second edge and the intermediate portion is removed. The memory chip package is disposed on a surface of the base board and between the first edge and the intermediate portion.

Claims (63)

1. A storage device, comprising:

a base board including

on a first edge, a connector that is connectable to a host device and through which the storage device communicates with the host device,

on a second edge that is opposite to the first edge, a first engaging portion by which the base board is fixable to the host device, and

in an intermediate portion that is located between the first edge and the second edge, a second engaging portion by which the base board is fixable to the host device when an end portion of the base board between the second edge and the intermediate portion is removed; and

a memory chip package disposed on a surface of the base board and between the first edge and the intermediate portion.

2. The storage device according to claim 1 , wherein

the base board includes a ground layer therein, and

each of the first and second engaging portions has a terminal that is electrically connected to the ground layer.

3. The storage device according to claim 2 , wherein

a coverage of the ground layer in the base board is greater than a coverage of the terminals in the base board.

4. The storage device according to claim 1 , wherein

the first engaging portion includes a semicircular recess, and

the second engaging portion includes a semicircular hole formed so as to become a semicircular recess when the portion of the base board is removed.

5. The storage device according to claim 1 , wherein

each of the first and second engaging portions includes a circular hole.

6. The storage device according to claim 1 , wherein

the base board further includes a fragile portion that is positioned between the intermediate portion and the end portion and extends in a direction parallel to the second edge.

7. The storage device according to claim 6 , wherein

the fragile portion includes a recess or hole that extends in the direction parallel to the second edge.

8. The storage device according to claim 6 , wherein

the fragile portion includes a plurality of holes arranged along the direction parallel to the second edge.

9. The storage device according to claim 1 , wherein

the base board further includes, in a second intermediate portion that is located between the first edge and the intermediate portion, a third engaging portion by which the base board is fixable to the host device when an end portion of the base board between the second edge and the second intermediate portion is removed, and

the memory chip package is disposed between the first edge and the second intermediate portion.

10. The storage device according to claim 9 , wherein

the base board further includes a second fragile portion that is positioned between the second intermediate portion and the intermediate portion and extends in a direction parallel to the second edge.

11. A computing device, comprising:

a circuit board having a receptor; and

a storage device disposed on the circuit board, the storage device including:

a base board including

on a first edge, a connector that is connected to the receptor and through which the storage device communicates with the circuit board,

on a second edge that is opposite to the first edge, an engaging portion that is fixed to the circuit board, and

in an intermediate portion that is located between the first edge and the second edge, a remnant engaging portion that is not fixed to the circuit board and structured substantially similarly to the engaging portion; and

a memory chip package disposed on a surface of the base board and between the first edge and the intermediate portion.

12. The computing device according to claim 11 , wherein

the base board includes a ground layer therein, and

each of the engaging portion and the remnant engaging portion has a terminal that is electrically connected to the ground layer.

13. The computing device according to claim 12 , wherein

a coverage of the ground layer in the base board is greater than a coverage of the terminals in the base board.

14. The computing device according to claim 11 , wherein

the engaging portion includes a semicircular recess, and

the remnant engaging portion includes a semicircular hole.

15. The computing device according to claim 11 , wherein

the base board further includes a fragile portion that is positioned between the intermediate portion and the end portion and extends in a direction parallel to the second edge.

16. A method for connecting a storage device to a host device thereof, the storage device having:

a base board including

on a first edge, a connector that is connectable to a host device and through which the storage device communicates with the host device,

on a second edge that is opposite to the first edge, a first engaging portion, and

in an intermediate portion that is located between the first edge and the second edge, a second engaging portion; and

a memory chip package disposed on a surface of the base board and between the first edge and the intermediate portion, the method comprising:

removing an end portion of the base board between the second edge and the intermediate portion, such that the second engaging portion is located on a removed edge of the base board;

connecting the base board from which the end portion has been removed, to a receptor of the host device that is disposed on a circuit board, such that the storage device can communicate with the host device; and

fixing the base board to the circuit board through the second engaging portion.

17. The method according to claim 16 , wherein

the base board is fixed to the circuit board at the second engaging portion using a fixing member.

18. The method according to claim 17 , wherein

the fixing member is formed of an electrically-conductive material, and the base board at the second engaging portion is electrically connected to ground by being fixed by the fixing member.

19. The method according to claim 16 , wherein

the base board further includes a fragile portion that is positioned between the intermediate portion and the end portion and extends in a direction parallel to the second edge, and

the end portion is removed by dividing the base board along the fragile portion.

20. The method according to claim 19 , wherein

the fragile portion includes a recess or hole that extends in the direction parallel to the second edge.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2016
From: IZAWA, KATSUMI; NAKATA, HIROKI; MATSUMOTO, MANABU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038637/0124 →