IP Library Granted Patent US 9,800,447
Granted Patent B2
US 9,800,447 · App. 14/951,579 · Granted Oct 24, 2017

Multi-mode orthogonal frequency division multiplexing transmitter for highly-spectrally-efficient communications

Inventors: Amir Eliaz (Moshav Ben Shemen, IL); Ilan Reuven (Ganey Tikva, IL)
Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
H04L27/2628H04L1/0054H04L25/02H04L25/03159H04L25/03197H04L25/03821H04L25/497H04L27/2647H04L27/3405H04L25/03038H04L2025/0342H04L2025/03414H04L2025/03522
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Quick Facts
Patent No.
US 9,800,447
App. No.
14/951,579
Granted
Oct 24, 2017
Kind
B2
Abstract

A transmitter may comprise a symbol mapper circuit and operate in at least two modes. In a first mode, the number of symbols output by the mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter may be greater than the number of data-carrying subcarriers used to transmit the OFDM symbol. In a second mode, the number of symbols output by said mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter is less than or equal to the number of data-carrying subcarriers used to transmit said OFDM symbol. The symbols output by the symbol mapper circuit may be N-QAM symbols. While the circuitry operates in the first mode, the symbols output by the mapper may be converted to physical subcarrier values via filtering and decimation prior to being input to an IFFT circuit.

Claims (58)

1. A transmitter comprising:

circuitry comprising a symbol mapper circuit and being operable in at least two modes, wherein:

while said circuitry operates in a first of said modes, a number of symbols output by said symbol mapper circuit for a first-mode orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter is greater than a number of data-carrying subcarriers used to transmit said first-mode OFDM symbol, the first-mode OFDM symbol being decimated by the circuitry to cause a predetermined amount of aliasing, the circuitry causing a predetermined amount of inter-subcarrier interference through an increase in a transmit power with which the first-mode OFDM symbol is transmitted in accordance with a predetermined non-linear distortion model; and

while said circuitry operates in a second of said modes, the number of symbols output by said symbol mapper circuit for a second-mode orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter is less than or equal to the number of data-carrying subcarriers used to transmit said second-mode OFDM symbol.

2. The transmitter of claim 1 , wherein:

said first-mode OFDM symbol and said second mode OFDM symbol are transmitted via a channel having nonlinearity;

said nonlinearity degrades a reception performance metric of said first-mode OFDM symbol by less than 1 dB; and

said nonlinearity degrades the reception performance metric of said second-mode OFDM symbol by 1 dB or more.

3. The transmitter of claim 1 , wherein the circuitry decimates said first-mode OFDM symbol to introduce the predetermined amount of aliasing such that a ratio of P 1 to P 2 is equal to or less than a threshold signal-to-noise ratio of a receiver to which OFDM subcarriers are transmitted, wherein:

P 1 is a total signal power of C′ virtual subcarrier values prior to said decimating; and

P 2 is a signal power of a portion of said C′ virtual subcarrier values residing at a frequency above a folding frequency determined by a decimation factor.

4. The transmitter of claim 1 , wherein symbols output by said symbol mapper circuit are N-QAM symbols, N being an integer.

5. The transmitter of claim 1 , wherein an input of said symbol mapper circuit is a forward error correction encoded bitstream.

6. The transmitter of claim 1 , wherein said circuitry comprises one or both of:

an inter-symbol correlation (ISC) generation circuit and a decimator circuit, wherein:

while said circuitry operates in said first of said modes, symbols output by said symbol mapper circuit are processed by said one or both of an ISC generation circuit and a decimator circuit; and

while said circuitry operates in said second of said modes, symbols output by said symbol mapper circuit bypass said one or both of an ISC generation circuit and a decimator circuit.

7. The transmitter of claim 6 , wherein the ISC generation circuit is a cyclic filter circuit.

8. The transmitter of claim 1 , wherein said circuitry comprises an inverse fast Fourier transform (IFFT) circuit and one or both of:

an inter-symbol correlation (ISC) generation circuit and a decimator circuit, wherein:

while said circuitry operates in said first of said modes, symbols output by said symbol mapper circuit are converted to physical subcarrier values by said one or both of an inter-symbol correlation (ISC) generation circuit and a decimator circuit prior to being input to said IFFT circuit; and

while said circuitry operates in said second of said modes, symbols output by said symbol mapper circuit are input to said IFFT circuit without first being converted to physical subcarrier values.

9. The transmitter of claim 1 , wherein said circuitry comprises a filtering and/or decimation circuit and an inverse fast Fourier transform (IFFT) circuit, wherein:

while said circuitry operates in a first of said modes:

said number of symbols output by said symbol mapper circuit is equal to a first number;

said filtering and/or decimation circuit multiplies said first number of symbols by a matrix to generate a second number of physical subcarrier values,

wherein a first dimension of said matrix is smaller than or equal to said first number and a second dimension of said matrix is equal to said first number; and

said second number of physical subcarrier values are transformed to said first-mode OFDM symbol by said IFFT circuit; and

while said circuitry operates in the second of said modes:

said number of symbols output by said mapper circuit is equal to said second number; and

said second number of symbols are transformed to said second-mode OFDM symbol by said IFFT circuit.

10. The transmitter of claim 1 , wherein said circuitry comprises an inter-symbol correlation (ISC) generation circuit, wherein:

while said circuitry operates in said first of said modes, said inter-symbol correlation (ISC) generation circuit performs a cyclic convolution on symbols output by said symbol mapper circuit.

11. The transmitter of claim 1 , wherein:

while said circuitry operates in said first of said modes, each of said data-carrying subcarriers used to transmit said first-mode OFDM symbol has a particular bandwidth; and

while said circuitry operates in said second of said modes, each of said data-carrying subcarriers used to transmit said second-mode OFDM symbol has said particular bandwidth.

12. The transmitter of claim 1 , wherein said circuitry is configurable between said first and said second of said modes during operation based on feedback from a receiving device, channel or other communication conditions, a network controller, an application layer of said transmitter, and/or user input.

13. The transmitter of claim 1 , wherein at least a portion of said circuitry used while said transmitter operates in said first of said modes is reused while said transmitter operates in said second of said modes.

14. The transmitter of claim 1 , wherein:

a first portion of said circuitry is powered off while operating in said first of said modes; and

a second portion of said circuitry is powered off while operating in said second of said modes.

15. The transmitter of claim 1 , wherein a limit on an amount of non-linear distortion introduced to said first-mode OFDM symbol by said transmitter is higher than a limit on an amount of non-linear distortion introduced to said second-mode OFDM symbol by said transmitter.

16. The transmitter of claim 1 , wherein said circuitry is configurable to switch between said first of said modes and said second of said modes on a frame-by-frame basis.

17. A method performed by an electronic transmitter that operates in at least two modes, said method comprising:

while said electronic transmitter operates in a first of said modes:

generating a first-mode orthogonal frequency division multiplexing (OFDM) symbol from a first number of mapped symbols;

decimating the first-mode OFDM symbol to cause a predetermined amount of aliasing;

increasing a transmit power with which the first-mode OFDM symbol is transmitted in accordance with a predetermined non-linear distortion model to cause a predetermined amount of inter-subcarrier interference; and

transmitting said first-mode OFDM symbol on a second number of data-carrying subcarriers, said second number being less than said first number; and

while said transmitter operates in a second of said modes:

generating a second-mode orthogonal frequency division multiplexing (OFDM) symbol from a third number of mapped symbols; and

transmitting said second-mode OFDM symbol using a fourth number of data-carrying subcarriers, said third number being equal to or less than said fourth number.

18. The method of claim 17 , wherein said mapped symbols of said first and third number of mapped symbols are N-QAM symbols, N being an integer.

19. The method of claim 17 , comprising generating said first and third number of mapped symbols from a forward error correction encoded bitstream.

20. The method of claim 17 , comprising:

while said transmitter operates in said first of said modes:

filtering and decimating said first number of mapped symbols to generate a number of values, said number of values being equal to said second number; and

transforming said values to said first-mode OFDM symbol via an inverse fast Fourier transform (IFFT).

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: MAGNACOM LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041604/0861 →
Continuity (9)
Continuation 14479428 · Sep 8, 2014
Continuation 13921749 · Jun 19, 2013
Provisional Application 61662085 · Jun 20, 2012
Provisional Application 61726099 · Nov 14, 2012
Provisional Application 61729774 · Nov 26, 2012
Provisional Application 61747132 · Dec 28, 2012
Provisional Application 61768532 · Feb 24, 2013
Provisional Application 61807813 · Apr 3, 2013
Related Publication 20160087830A1 · Mar 24, 2016