IP Library Granted Patent US 9,830,964
Granted Patent B2
US 9,830,964 · App. 13/770,280 · Granted Nov 28, 2017

Non-volatile array wakeup and backup sequencing control

Inventors: Steven Craig Bartling (Plano, TX); Sudhanshu Khanna (Richardson, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
G11C7/22G06F1/3203G06F1/3234G06F1/3275G06F1/3287G06F3/0679G06F3/0688G06F9/4401G06F9/4406G06F11/1032G06F11/1438G06F11/1469G06F12/0238G06F13/00G11C14/00Y02B60/1282Y02B60/32
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Quick Facts
Patent No.
US 9,830,964
App. No.
13/770,280
Granted
Nov 28, 2017
Kind
B2
Abstract

Individual first ones of a plurality of non-volatile logic element arrays are designated to restore first in response to entering a wakeup or restoration mode. These non-volatile logic element arrays include instructions for an order in which other non-volatile logic element arrays are to be restored next. So configured, the processing device can be set to have one or more NVL arrays restored first, which arrays are pre-configured to guide further wakeup of the device through directed restoration from particular NVL arrays. Certain NVL arrays can be skipped if the functions stored therein are not needed, and the order of restoration of others can be tailored to a particular wakeup time and power concern through restoration in parallel, serial, or combinations thereof.

Claims (29)

1. A computing device apparatus providing non-volatile logic based computing, the apparatus comprising:

a plurality of non-volatile logic element arrays;

a plurality of volatile storage elements;

at least one non-volatile logic controller configured to control the plurality of non-volatile logic element arrays to store a machine state represented by the plurality of volatile storage elements and to read out a stored machine state from the plurality of non-volatile logic element arrays to the plurality of volatile storage elements;

wherein the at least one non-volatile logic controller is further configured to receive signals through a user interface to designate individual first ones of the plurality of non-volatile logic element arrays to restore first in response to the computing device apparatus's entering a wakeup or restoration mode, wherein the individual first ones of the plurality of non-volatile logic element arrays include instructions for an order in which other ones of the plurality of non-volatile logic element arrays are to be restored next.

2. The computing device apparatus of claim 1 wherein the at least one non-volatile logic controller is further configured to associate individual one or more functions with individual ones of the plurality of non-volatile logic element arrays.

3. The computing device apparatus of claim 2 wherein the one or more functions comprise any one of a plurality of peripheral functions for the computing device apparatus.

4. The computing device apparatus of claim 1 wherein the at least one non-volatile logic controller is further configured to control an order in which individual ones of the plurality of non-volatile logic element arrays are to be restored in response to the instructions from the individual first ones of the plurality of non-volatile logic element arrays.

5. The computing device apparatus of claim 1 wherein the at least one non-volatile logic controller is configured to control the order in which the other ones of the plurality of non-volatile logic element arrays are to be restored including controlling restoration of data from the plurality of non-volatile logic element arrays in serial, in parallel, or in combinations thereof.

6. A method comprising:

operating a processing device using a plurality of volatile storage elements;

storing in a plurality of non-volatile logic element arrays a machine state of the processing device stored in the plurality of volatile storage elements in response to the processing device entering a backup mode;

designating individual first ones of the plurality of non-volatile logic element arrays to restore first in response to the processing device entering a wakeup or restoration mode;

restoring, from the individual first ones of the plurality of non-volatile logic element arrays, instructions for an order in which other ones of the plurality of non-volatile logic element arrays are to be restored; and

controlling an order of restoration of the plurality of non-volatile logic element arrays based on the instructions restored from the individual first ones of a plurality of non-volatile logic element arrays.

7. The method of claim 6 , wherein the processing device is configured to execute at least one function, the method further comprising associating individual ones of the at least one function with individual ones of the plurality of non-volatile logic element arrays.

8. The method of claim 7 wherein the associating the at least one function with individual ones of the plurality of non-volatile logic element arrays further comprises designating any one of a plurality of peripheral functions for the processing device.

9. The method of claim 6 , wherein the processing device is configured to execute at least one function, the method further comprising controlling an order in which data from the individual ones of the at least one function are stored in the plurality of non-volatile logic element arrays in response to the processing device entering the backup mode.

10. The method of claim 6 , wherein the processing device is configured to execute at least one function, the method further comprising in response to receiving the instructions from the individual first ones of the plurality of non-volatile logic element arrays, arranging configuration bits that direct operation of the at least one non-volatile logic controller during the wakeup or restoration mode to effect controlling the order in which data from the individual ones of the at least one function are restored from the plurality of non-volatile logic element arrays in response to the processing device entering the wakeup or restoration mode.

11. The method of claim 6 wherein the controlling the order of restoration comprises controlling restoration of the plurality of non-volatile logic element arrays in serial, in parallel, or in combinations thereof.

12. A method comprising:

operating a processing device using a plurality of volatile storage elements;

storing in a plurality of non-volatile logic element arrays a machine state of the processing device stored in the plurality of volatile storage elements in response to the processing device entering a backup mode;

designating individual first ones of the plurality of non-volatile logic element arrays to restore first in response to the processing device entering a wakeup or restoration mode;

restoring, from the individual first ones of the plurality of non-volatile logic element arrays, instructions for an order in which other ones of the plurality of non-volatile logic element arrays are to be restored; and

controlling an order of restoration of the plurality of non-volatile logic element arrays based on instructions restored from the individual first ones of the plurality of non-volatile logic element arrays including controlling restoration of the plurality of non-volatile logic element arrays in serial, in parallel, or in combinations thereof by arranging configuration bits that direct operation of the at least one non-volatile logic controller.

13. The method of claim 12 , wherein the processing device is configured to execute at least one function, the method further comprising controlling an order in which data from individual ones of the at least one function are stored in the plurality of non-volatile logic element arrays in response to the processing device entering the backup mode.

14. The method of claim 12 , wherein the processing device is configured to execute at least one function, the method further comprising associating individual ones of the at least one function with individual ones of the plurality of non-volatile logic element arrays.

15. The method of claim 14 wherein the associating individual ones of the at least one function with individual ones of the plurality of non-volatile logic element arrays comprises designating any one of a plurality of peripheral functions for the processing device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2013
From: BARTLING, STEVEN CRAIG; KHANNA, SUDHANSHU
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 031430/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2013
From: BARTLING, STEVEN CRAIG; KHANNA, SUDHANSHU
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 030165/0156 →
Continuity (2)
Provisional Application 61698906 · Sep 10, 2012
Related Publication 20140075225A1 · Mar 13, 2014