IP Library Granted Patent US 9,836,071
Granted Patent B2
US 9,836,071 · App. 14/983,420 · Granted Dec 5, 2017

Apparatus for multiple-input power architecture for electronic circuitry and associated methods

Inventors: Nicholas M. Atkinson (Austin, TX); Praveen Kallam (Austin, TX); Timothy T. Rueger (Austin, TX)
Assignee: Silicon Laboratories Inc.
G05F1/59G06F1/3243H02J7/0052
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Quick Facts
Patent No.
US 9,836,071
App. No.
14/983,420
Granted
Dec 5, 2017
Kind
B2
Abstract

An apparatus includes an integrated circuit (IC). The IC includes a power controller, which includes a regulator and a controller. The regulator receives a plurality of input voltages and provides a regulated output voltage. The controller controls the regulator to generate the regulated output voltage from the plurality of input voltages. The power controller provides power to a load integrated in the IC from a set of arbitrary input voltages. The set of arbitrary input voltages includes the plurality of input voltages.

Claims (32)

1. An apparatus, comprising:

an integrated circuit (IC), comprising:

a power controller comprising:

a regulator comprising a plurality of voltage regulators coupled to receive a plurality of input voltages and to provide a regulated output voltage; and

a controller to control the regulator to generate the regulated output voltage from the plurality of input voltages;

wherein the power controller provides power to a load integrated in the IC from a set of arbitrary input voltages, the set of arbitrary input voltages comprising the plurality of input voltages.

2. The apparatus according to claim 1 , wherein the load integrated in the IC comprises a core circuit of the IC.

3. The apparatus according to claim 2 , wherein the set of arbitrary input voltages further includes a voltage received from a source external to the IC.

4. The apparatus according to claim 3 , wherein the voltage received from the source external to the IC selectively provides power to the core circuit under control of the power controller.

5. The apparatus according to claim 1 , wherein the power controller comprises circuitry in a plurality of power domains.

6. The apparatus according to claim 5 , wherein the power controller further comprises a plurality of level shifters to facilitate communication among circuitry in the plurality of power domains.

7. The apparatus according to claim 6 , wherein the power controller further comprises a plurality of power on circuits to sequence provision of power to circuitry in the plurality of power domains.

8. The apparatus according to claim 1 , wherein at least one voltage regulator in the plurality of voltage regulators comprises a cascode configuration including first and second transistors, and wherein the IC further comprises a bias circuit to provide a bias signal to the second transistor.

9. An apparatus, comprising:

a microcontroller unit (MCU), comprising:

a power controller comprising:

a regulator comprising a plurality of voltage regulators to receive a plurality of input voltages and to provide a regulated output voltage; and

a controller to control the regulator to generate the regulated output voltage from the plurality of input voltages;

wherein the power controller sequences provision of power to circuitry in the MCU to power up a core circuit of the MCU.

10. The apparatus according to claim 9 , wherein the power controller sequences provision of power to circuitry in the MCU from a set of arbitrary input voltages.

11. The apparatus according to claim 10 , wherein the set of arbitrary input voltages comprises plurality of input voltages and a voltage received from a source external to the MCU.

12. The apparatus according to claim 11 , wherein the voltage received from the source external to the IC selectively provides power to the core circuit under control of the power controller.

13. The apparatus according to claim 9 , wherein once the core circuit is powered up, the core circuit provides control signals to the controller.

14. A method of providing power to circuitry in an integrated circuit (IC), the method comprising:

receiving a plurality of input voltages in a regulator;

controlling the regulator to generate the regulated output voltage from the plurality of input voltages by controlling a plurality of voltage regulators included in the regulator to receive the plurality of input voltages and provide the regulated output voltage; and

providing power to a load integrated in the IC from a set of arbitrary input voltages, the set of arbitrary input voltages comprising the plurality of input voltages.

15. The method according to claim 14 , wherein providing power to the load integrated in the IC further comprises providing power to a core circuit of the IC.

16. The method according to claim 15 , wherein the set of arbitrary input voltages further includes a voltage received from a source external to the IC.

17. The method according to claim 16 , further comprising selectively providing power to the core circuit from the voltage received from the source external to the IC.

18. The method according to claim 14 , wherein circuitry in the IC comprises circuitry in a plurality of power domains, and wherein the load is included in a power domain in the plurality of power domains.

19. The method according to claim 14 , wherein controlling the regulator to generate the regulated output voltage from the plurality of input voltages further comprises using a plurality of level shifters to facilitate communication among circuitry in a plurality of power domains.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2016
From: RUEGER, TIMOTHY T.; KALLAM, PRAVEEN; ATKINSON, NICHOLAS M
To: SILICON LABORATORIES INC.
Reel/Frame 037972/0832 →
Continuity (1)
Related Publication 20170185094A1 · Jun 29, 2017