Image reading apparatus and semiconductor device

1. An image reading apparatus comprising:

an image reading chip for reading an image,

wherein

the image reading chip includes

a plurality of pixel units which include a light receiving element which receives light from the image so as to perform photoelectric conversion,

an analog circuit,

a logic circuit, and

a power source pad to which a power source voltage is supplied,

the image reading chip has a shape which includes a first side and a second side shorter than the first side,

the plurality of pixel units is arranged in a line in a direction along the first side,

a distance between the analog circuit and a median point of the first side is shorter than a distance between the logic circuit and the median point of the first side, and

a distance between the analog circuit and the power source pad is shorter than a distance between the logic circuit and the power source pad.

2. The image reading apparatus according to claim 1 , wherein

the image reading chip includes an input pad for inputting an input signal to the image reading chip, and an output pad for outputting an output signal from the image reading chip, and

a distance between the power source pad and the median point of the first side is shorter than a distance between the input pad and the median point of the first side, and is shorter than a distance between the output pad and the median point of the first side.

3. The image reading apparatus according to claim 2 , wherein

the analog circuit, the logic circuit, the power source pad, the input pad, and the output pad are arranged in the direction along the first side.

4. The image reading apparatus according to claim 1 , wherein

the image reading chip includes a first power source wiring for electrically connecting the analog circuit and the power source pad, and a second power source wiring for electrically connecting the logic circuit and the power source pad, and

the first power source wiring and the second power source wiring are branched at a position of the power source pad.

5. The image reading apparatus according to claim 1 , wherein

the power source pad includes a first power source pad to which a first power source voltage is supplied, and a second power source pad to which a second power source voltage lower than the first power source voltage is supplied.

6. The image reading apparatus according to claim 1 , wherein

the power source pad includes a first power source pad to which a first power source voltage is supplied, and a second power source pad to which a second power source voltage lower than the first power source voltage is supplied,

the image reading chip includes a first power source wiring for electrically connecting the analog circuit and the first power source pad, a second power source wiring for electrically connecting the logic circuit and the first power source pad, a third power source wiring for electrically connecting the analog circuit and the second power source pad, and a fourth power source wiring for electrically connecting the logic circuit and the second power source pad, and

in a plan view of the image reading chip, the first power source wiring and the second power source wiring are provided so as not to overlap the second power source pad, and the third power source wiring and the fourth power source wiring are provided so as not to overlap the first power source pad.

7. The image reading apparatus according to claim 1 , wherein

the analog circuit includes a voltage boosting circuit configured to boost the power source voltage.

8. The image reading apparatus according to claim 1 , wherein

the analog circuit includes a pixel drive circuit configured to generate a drive signal for driving the pixel unit.

9. The image reading apparatus according to claim 1 , wherein

the analog circuit includes a noise reduction circuit configured to reduce noise included in an output signal output from the pixel unit.

10. The image reading apparatus according to claim 1 , wherein

the analog circuit includes an amplification circuit configured to amplify an output signal output from the pixel unit.

11. The image reading apparatus according to claim 5 , wherein

the analog circuit includes a voltage boosting circuit configured to boost the power source voltage, a pixel drive circuit configured to generate a drive signal for driving the pixel unit, a noise reduction circuit configured to reduce noise included in an output signal output from the pixel unit, and an amplification circuit configured to amplify the output signal,

the voltage boosting circuit and the pixel drive circuit are provided at a position which is nearer to the first power source pad than the second power source pad, and

the noise reduction circuit and the amplification circuit are provided at a position which is nearer to the second power source pad than the first power source pad.

12. A semiconductor device which has a shape including a first side and a second side shorter than the first side, the device comprising:

a plurality of pixel units which include a light receiving element which receives light so as to perform photoelectric conversion;

an analog circuit;

a logic circuit; and

a power source pad to which a power source voltage is supplied,

wherein

the plurality of pixel units is arranged in a line in a direction along the first side,

a distance between the analog circuit and a median point of the first side is shorter than a distance between the logic circuit and the median point of the first side, and

a distance between the analog circuit and the power source pad is shorter than a distance between the logic circuit and the power source pad.