IP Library Granted Patent US 9,953,979
Granted Patent B2
US 9,953,979 · App. 14/673,485 · Granted Apr 24, 2018

Contact wrap around structure

Inventors: Jeffrey Junhao Xu (San Diego, CA); Stanley Seungchul Song (San Diego, CA); Vladimir Machkaoutsan (Leuven, BE); Mustafa Badaroglu (Leuven, BE); Junjing Bao (San Diego, CA); John Jianhong Zhu (San Diego, CA); Da Yang (San Diego, CA); Choh Fei Yeap (San Diego, CA)
Assignee: QUALCOMM Incorporated
H01L27/0924H01L21/285H01L21/76897H01L21/823821H01L29/41791H01L29/42392H01L29/66545H01L29/66795H01L29/775H01L29/785H01L29/78696H01L29/0673H01L29/0847H01L2029/7858
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Quick Facts
Patent No.
US 9,953,979
App. No.
14/673,485
Granted
Apr 24, 2018
Kind
B2
Abstract

A semiconductor device includes a gate stack. The semiconductor device also includes a wrap-around contact arranged around and contacting substantially all surface area of a regrown source/drain region of the semiconductor device proximate to the gate stack.

Claims (26)

1. A semiconductor device, comprising:

a gate stack;

a gate spacer on sidewalls of the gate stack;

a fin spacer on sidewalls of the gate spacer;

a pre-metal dielectric on the fin spacer; and

a wrap-around non-silicide contact on the gate spacer, the fin spacer, and the pre-metal dielectric, the wrap-around non-silicide contact extending around and contacting substantially all surface area of a regrown source/drain region of a fin supported by a base fin-portion extending from a first surface to an opposing second surface of an isolation region of the semiconductor device proximate to the gate stack, the regrown source/drain region of the fin having substantially parallel sidewalls, a fin width of the base-fin portion being substantially equal to a fin width of a widest portion of the regrown source/drain region of the fin.

2. The semiconductor device of claim 1 , in which the semiconductor device comprises a fin field-effect transistor (FinFET).

3. The semiconductor device of claim 2 , in which the gate stack is on a surface of the base fin-portion.

4. The semiconductor device of claim 3 , in which the base fin-portion comprises silicon, germanium, or silicon germanium.

5. The semiconductor device of claim 1 , in which the wrap-around non-silicide contact comprises a metal insulator semiconductor (MIS) contact or a direct contact.

6. The semiconductor device of claim 5 , in which the wrap-around non-silicide contact comprises the MIS contact coupled to an n-type metal oxide semiconductor (NMOS) region of the semiconductor device or the wrap-around non-silicide contact comprises the direct contact coupled to a p-type metal oxide semiconductor (PMOS) region of the semiconductor device.

7. The semiconductor device of claim 6 , in which the wrap-around non-silicide contact comprises the MIS contact coupled to the NMOS region of the semiconductor device, and the MIS contact comprises:

a titanium oxide layer (TiO 2 ) on the NMOS region of the semiconductor device; and

a titanium layer (Ti) on the titanium oxide layer.

8. The semiconductor device of claim 6 , in which the wrap-around non-silicide contact comprises the direct contact coupled to the PMOS region of the semiconductor device, and the direct contact comprises a titanium layer (Ti) on the PMOS region of the semiconductor device.

9. The semiconductor device of claim 1 integrated into a mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation device, a computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and/or a fixed location data unit.

10. A semiconductor device, comprising:

a gate stack;

a gate spacer on sidewalls of the gate stack;

a fin spacer on sidewalls of the gate spacer;

a pre-metal dielectric on the fin spacer; and

means for contacting the gate spacer, the fin spacer, the pre-metal dielectric, and substantially all surface area of a regrown source/drain region of a fin supported by a base fin-portion extending from a first surface to an opposing second surface of an isolation region of the semiconductor device proximate to the gate stack, the regrown source/drain region of the fin having substantially parallel sidewalls, and a fin width of the base-fin portion being substantially equal to a fin width of a widest portion of the regrown source/drain region of the fin.

11. The semiconductor device of claim 10 , in which the semiconductor device comprises a fin field-effect transistor (FinFET).

12. The semiconductor device of claim 11 , in which the gate stack is on a surface of the base fin-portion.

13. The semiconductor device of claim 12 , in which the base fin-portion comprises silicon, germanium, or silicon germanium.

14. The semiconductor device of claim 10 integrated into a mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation device, a computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and/or a fixed location data unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2015
From: XU, JEFFREY JUNHAO; SONG, STANLEY SEUNGCHUL; MACHKAOUTSAN, VLADIMIR; BADAROGLU, MUSTAFA; BAO, JUNJING; ZHU, JOHN JIANHONG; YANG, DA; YEAP, CHOH FEI
To: QUALCOMM INCORPORATED
Reel/Frame 035622/0389 →
Continuity (2)
Provisional Application 62083714 · Nov 24, 2014
Related Publication 20160148936A1 · May 26, 2016