IP Library Granted Patent US 9,996,497
Granted Patent B2
US 9,996,497 · App. 15/160,894 · Granted Jun 12, 2018

Method and device for processing graphics

Inventors: Yanjie Wang (Shanghai, CN); Chenyang Zhu (Shanghai, CN)
Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
G06F13/4282
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Quick Facts
Patent No.
US 9,996,497
App. No.
15/160,894
Granted
Jun 12, 2018
Kind
B2
Abstract

A method for processing graphics is provided. The method includes: establishing streams corresponding to graphic layers drawn by at least one application; adding a one-shot signal to the end of the last stream of the streams; packaging the streams with the one-shot signal to form a packet; and transmitting the packet to a display interface unit (DIU).

Claims (58)

1. A method for processing graphics, comprising:

establishing streams corresponding to graphic layers drawn by at least one application;

adding a one-shot signal to the end of the last stream of the streams;

packaging the streams with the one-shot signal to form a packet; and

transmitting the packet to a display interface unit (DIU).

2. A device for processing graphics, comprising:

a control circuit;

a processor installed in the control circuit; and

a memory installed in the control circuit and operatively coupled to the processor;

wherein the processor is configured to execute a program code stored in the memory to instruct a hardware composer to:

establish streams corresponding to graphic layers drawn by at least one application;

add a one-shot signal to an end of a last stream of the streams;

package the streams with the one-shot signal to form a packet; and

transmit the packet to a display interface unit (DIU).

3. A method for processing graphics, comprising:

receiving a packet;

detecting whether the packet includes a one-shot signal;

combining streams corresponding to graphic layers drawn by at least one application into a frame after detecting that the packet includes the one-shot signal; and

transmitting the frame to a display device to display the frame.

4. The method for processing graphics as claimed in claim 3 , further comprising:

combining previous streams and the streams into the frame, and transmitting the frame to the display device after detecting that the packet does not include the one-shot signal and receiving a vertical synchronization (VSYNC) signal.

5. A device for processing graphics, comprising:

a control circuit;

a processor installed in the control circuit; and

a memory installed in the control circuit and operatively coupled to the processor;

wherein the processor is configured to execute a program code stored in the memory to instruct a display interface unit (DIU) to:

receive a packet;

detect whether the packet includes a one-shot signal;

combine streams corresponding to graphic layers drawn by at least one application into a frame after detecting that the packet includes the one-shot signal; and

transmit the frame to a display device to display the frame.

6. The device for processing graphics as claimed in claim 5 , wherein the processor further executes the program code to instruct the DIU to:

combine previous streams and the streams into the frame, and transmit the frame to the display device after detecting that the packet does not include the one-shot signal and receiving a vertical synchronization (VSYNC) signal.

7. A method for processing graphics, comprising:

establishing, by a hardware composer, streams corresponding to graphic layers drawn by at least one application;

adding, by the hardware composer, a one-shot signal to an end of a last stream of the streams;

packaging, by the hardware composer, the streams with the one-shot signal to form a packet;

transmitting, by the hardware composer, the packet to a display interface unit (DIU);

receiving, by the DIU, the packet;

detecting, by the DIU, whether the packet includes the one-shot signal;

combining, by the DIU, the streams into a frame after detecting that the packet includes the one-shot signal; and

transmitting, by the DIU, the frame to a display device for displaying the frame.

8. The method for processing graphics as claimed in claim 4 , the method further comprising:

combining, by the DIU, previous streams and the streams into the frame, and transmitting the frame to the display device after detecting that the packet does not include the one-shot signal and receiving a vertical synchronization (VSYNC) signal.

9. A device for processing graphics, comprising:

a control circuit;

a processor installed in the control circuit; and

a memory installed in the control circuit and operatively coupled to the processor;

wherein the processor is configured to execute a program code stored in the memory to instruct a hardware composer and a display interface unit (DIU) to:

establish, by a hardware composer, streams corresponding to graphic layers drawn by at least one application;

add, by the hardware composer, a one-shot signal to the end of the last stream of the streams;

package, by the hardware composer, the streams with the one-shot signal to form a packet;

transmit, by the hardware composer, the packet to a display interface unit (DIU);

receive, by the DIU, the packet;

detect, by the DIU, whether the packet includes the one-shot signal;

combine, by the DIU, the streams into a frame after detecting that the packet includes the one-shot signal; and

transmit, by the DIU, the frame to a display device to display the frame.

10. The device for processing graphics as claimed in claim 9 , wherein the processor further executes the program code to instruct the DIU to:

combine previous streams and the streams into the frame, and transmit the frame to the display device after detecting that the packet does not include the one-shot signal and receiving a vertical synchronization (VSYNC) signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2021
From: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
To: GLENFLY TECH CO., LTD.
Reel/Frame 058965/0042 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2016
From: WANG, YANJIE; ZHU, CHENYANG
To: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
Reel/Frame 038661/0804 →
Priority Claims (1)
CN 2015 1 0868958 · Dec 1, 2015 · national
Continuity (1)
Related Publication 20170154401A1 · Jun 1, 2017