IP Library Granted Patent US 9,997,500
Granted Patent B1
US 9,997,500 · App. 15/439,268 · Granted Jun 12, 2018

Common-source packaging structure

Inventors: Chien-Chung Chen (New Taipei, TW); Sen Mao (New Taipei, TW); Hsin-Liang Lin (New Taipei, TW)
Assignee: TAIWAN SEMICONDUCTOR CO., LTD.
H01L25/072H01L23/3121H01L24/06H01L24/40H01L24/48H01L2224/40101H01L2224/40137H01L2224/48101H01L2224/48137H01L2924/13091
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Quick Facts
Patent No.
US 9,997,500
App. No.
15/439,268
Granted
Jun 12, 2018
Kind
B1
Abstract

A common-source type package structure is provided in the present invention. In the package structure, an integrated component body is configured a common-source pin region, a first arrangement region and a second arrangement region. The second and first arrangement regions are spaced apart from each other. A first MOSFET die and a second MOSFET are respectively located at the first and second arrangement region respectively, and have a top surface, a source electrode pad and a gate electrode pad. The source electrode pad and the gate electrode pad are exposed to the top surface and spaced apart from each other. A common-source connection element is connected to the source electrode pad and the common-source pin region. A gate connection element is connected to the gate electrode pad and a gate pin region of the integrated component body.

Claims (19)

1. A common-source packaging structure, comprising:

an integrated circuit (IC) unit, comprising:

a main body, having a common-source region, a first gate region, a second gate region, a first arrangement region, and a second arrangement region, wherein the first arrangement region and the second arrangement region are separated from each other;

a first metal-oxide-semiconductor field-effect transistor (MOSFET) die, located on the first arrangement region, having a first upper layer, and comprising:

at least one first source electrode pad, exposed through the first upper layer; and

at least one first gate electrode pad, spaced apart from the at least one first source electrode pad, and exposed through the first upper layer;

a second MOSFET die, located on the second arrangement region, having a second upper layer, and comprising:

at least one second source electrode pad, exposed through the second upper layer; and

at least one second gate electrode pad, spaced apart from the at least one second source electrode pad, and exposed through the second upper layer;

at least one common-source connection element, connected to the at least one first source electrode pad, the at least one second source electrode pad, and the common-source region;

at least one first gate connection element, connected to the first gate electrode pad and the first gate region;

at least one second gate connection element, connected to the second gate electrode pad and the second gate region; and

a packaging body, at least partially covering the IC unit.

2. The common-source packaging structure of claim 1 , wherein the common-source region includes at least one first source pin and at least one second source pin, the first gate region includes at least one first gate pin, the second gate region includes at least one second gate pin, and the at least first one gate pin, the at least one source pin, the at least one second source pin, and the at least one second gate pin are arranged along a direction in a serial.

3. The common-source packaging structure of claim 1 , wherein the at least one first source electrode pad includes at least one first notch, and the at least one first gate electrode pad is arranged close to the at least one first notch.

4. The common-source packaging structure of claim 1 , wherein the at least one second source electrode pad includes at least one second notch, and the at least one second gate electrode pad is arranged close to the at least one second notch.

5. The common-source packaging structure of claim 1 , wherein the at least common-source connection element is an one-piece metal clip.

6. The common-source packaging structure of claim 1 , wherein the at least one common-source connection element is at least one conductive wire.

7. The common-source packaging structure of claim 1 , wherein the at least one first gate connection element and the at least one second gate connection element are at least one conductive wire respectively.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2017
From: CHEN, CHIEN-CHUNG; MAO, SEN; LIN, HSIN-LIANG
To: TAIWAN SEMICONDUCTOR CO., LTD.
Reel/Frame 041358/0698 →
Priority Claims (1)
TW 105141464 A · Dec 14, 2016 · national