IP Library Granted Patent US 7,248,631
Granted Patent B2
US 7,248,631 · App. 10/060,236 · Granted Jul 24, 2007

Method for reducing processing power requirements of a video decoder

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Quick Facts
Patent No.
US 7,248,631
App. No.
10/060,236
Granted
Jul 24, 2007
Kind
B2
Abstract

A system and method dynamically process video data received by a video decoder by determining a throttling amount, at a decoder throttling device, based on a measure of computational processing power required to decode at least one bitstream of the video data or the decoder's processing capabilities. The computational processing requirements of the decoder are controlled based on the throttling amount, including reducing the processing performed on the decoded video data prior to displaying a picture associated with the decoded video data. The decoder may reduce the amount of processing by limiting functions of at least one post filter or conversion filter. The computational processing requirements may also be controlled by comparing temporal references of two motion vectors of a picture of the video data, determining which motion vector has a closer temporal distance from the picture being decoded and processing only the motion vector having the closer temporal distance.

Claims (63)

1. A method of controlling processing requirements of a video decoder that receives and decodes incoming video data, the method comprising:

determining a throttling amount, using a measure of computational processing power required to decode at least one bitstream of the video data and a measure of the decoder's processing capabilities, without requiring encoded throttling control data associated with the video data; and

reducing computational processing of the video data by the decoder, based on the throttling amount, comprising reducing an amount of processing performed on the decoded video data prior to displaying a picture comprising the decoded video data.

2. The method according to claim 1 , wherein reducing the amount of processing comprises limiting a function of at least one post filter.

3. The method according to claim 1 , wherein reducing the amount of processing comprises limiting a function of at least one format conversion filter.

4. The method according to claim 1 , wherein the measure of the computational processing power required to decode the at least one bitstream comprises at least one of:

an indication of syntax elements in the bitstream;

an indication of a type of processing required for the bitstream;

an indication of an amount of processing required for the bitstream; and

a combination of the type and the amount of processing required for the bitstream.

5. A system for dynamically processing incoming video data comprising:

a video decoder that receives and decodes the video data; and

a decoder throttler that receives from the decoder a measure of computational processing power required to decode the video data and a measure of a processing capability of the decoder, and without receiving encoded throttling control data, determines a throttling amount based on the measure of the computational processing power and the measure of the processing capability of the decoder;

wherein the decoder throttler provides the throttling amount to the decoder, which reduces an amount of processing performed on the decoded video data prior to displaying a picture comprising the decoded video data, in accordance with the throttling amount.

6. The system according to claim 5 , further comprising at least one post filter, the decoder reducing the amount of processing by limiting functions of the at least one post filter.

7. The system according to claim 5 , further comprising at least one format conversion filter, the decoder reducing the amount of processing by limiting functions of the at least one format conversion filter.

8. The system according to claim 5 , further comprising a bitstream indicator extractor that measures the computational processing power required to decode at least one bitstream of the video data by at least one of:

measuring an indication of syntax elements in the bitstream;

measuring an indication of a type of processing required for the bitstream;

measuring an indication of an amount of processing required for the bitstream; and

measuring a combination of the type and the amount of processing required for the bitstream.

9. A method of controlling processing requirements of a video decoder that receives and decodes incoming video data, the method comprising:

determining a throttling amount, using a measure of computational processing power required to decode at least one bitstream of the video data and a measure of the decoder's processing capabilities, without requiring encoded throttling control data associated with the video data; and

reducing computational processing of the video data by the decoder, based on the throttling amount, comprising reducing a number of coefficients inverse quantized and inverse DCT transformed by selectively setting coefficients to alternate values.

10. The method according to claim 9 , wherein the alternate values comprise zero.

11. The method according to claim 9 , wherein the measure of the computational processing power required to decode the at least one bitstream comprises at least one of:

an indication of syntax elements in the bitstream;

an indication of a type of processing required for the bitstream;

an indication of an amount of processing required for the bitstream; and

a combination of the type and the amount of processing required for the bitstream.

12. A system for dynamically processing incoming video data comprising:

a video decoder that receives and decodes the video data; and

a decoder throttler that receives from the decoder a measure of computational processing power required to decode the video data and a measure of a processing capability of the decoder, and without receiving encoded throttling control data, determines a throttling amount based on the measure of the computational processing power and the measure of the processing capability of the decoder;

wherein the decoder throttler provides the throttling amount to the decoder, which reduces a number of coefficients inverse quantized and inverse DCT transformed by selectively setting coefficients to alternate values, in accordance with the throttling amount.

13. The system according to claim 12 , further comprising a bitstream indicator extractor that measures the computational processing power required to decode at least one bitstream of the video data by at least one of:

measuring an indication of syntax elements in the bitstream;

measuring an indication of a type of processing required for the bitstream;

measuring an indication of an amount of processing required for the bitstream; and

measuring a combination of the type and the amount of processing required for the bitstream.

14. A method of reducing processing power requirements of a video decoder that receives and decodes incoming video data, the method comprising:

determining a throttling amount based on at least one of a measure of computational processing power required to decode at least one bitstream of the video data and a measure of the decoder's processing capabilities; and

controlling computational processing requirements of the decoder, based on the throttling amount, the controlling the computational processing requirements comprising:

comparing two temporal references corresponding to two motion vectors of a picture of the video data being decoded;

determining which one of the two motion vectors has a closer temporal distance from the picture being decoded, based on the temporal references; and

processing only the one of the two motion vectors having the closer temporal distance.

15. The method according to claim 14 , in which the two temporal references comprise forward references.

16. The method according to claim 14 , in which the two temporal references comprise a forward reference and a backward reference.

17. The method according to claim 14 , wherein the measure of the computational processing power required to decode the at least one bitstream comprises at least one of:

an indication of syntax elements in the bitstream;

an indication of a type of processing required for the bitstream;

an indication of an amount of processing required for the bitstream; and

a combination of the type and the amount of processing required for the bitstream.

18. A system for dynamically processing an incoming video data comprising:

a video decoder that receives and decodes the video data;

a decoder throttler that determines a throttling amount based on at least one of a measure of computational processing power required to decode the video data and a measure of a processing capability of the decoder; and

a bitstream indicator extractor that extracts two temporal references associated with two motion vectors of each picture to be decoded by the video decoder;

wherein the decoder throttler provides the throttling amount to the decoder, which processes, for each picture, only one of the two motion vectors having a closer temporal distance from the picture being decoded, based on a comparison of the two temporal references associated with the two motion vectors.

19. The system for dynamically processing an incoming video data according to claim 18 , wherein each picture from which the two temporal references are extracted comprises a B-picture.

20. The system according to claim 18 , the bitstream indicator extractor further measures the computational processing power required to decode at least one bitstream of the video data by at least one of:

measuring an indication of syntax elements in the bitstream;

measuring an indication of a type of processing required for the bitstream;

measuring an indication of an amount of processing required for the bitstream; and

measuring a combination of the type and the amount of processing required for the bitstream.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2018
From: PANASONIC CORPORATION
To: SOVEREIGN PEAK VENTURES, LLC
Reel/Frame 047914/0675 →
CHANGE OF NAME Recorded Oct 29, 2018
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 047346/0494 →