Alignment sensing method for semiconductor device
View Patent ↗Strip-shaped alignment marks 14 are juxtaposed with each other in a silicon oxide film 12 formed on a silicon wafer 10 . Each alignment mark 14 comprises a plurality of grooves 16 formed side by side in the silicon oxide film 12 . An amorphous silicon film 18 is buried in the grooves 16 . Thus, the alignment marks 14 are formed in a thus-formed line-and-space pattern. Accordingly, waveforms of detected signals having high contrast and little deformation can be obtained, and alignment of wafers with high accuracy can be realized.
1. A semiconductor device comprising a plurality of alignment marks formed over a semiconductor wafer,
each of the alignment marks being divided by a micronized line-and-space pattern into a plurality of lines extending along a first direction,
each of the plural lines being divided in a broken line having a plurality of segments which are arranged in the first direction only, the plurality of segments of the lines being positioned offset in the first direction from the plurality of segments of their adjacent lines,
wherein all of the alignment marks formed in an entire alignment mark area have a same shape so as to generate about a same field image alignment signal.
2. A semiconductor device according to claim 1 , wherein
a margin in which the micronized pattern is formed is larger than a margin for a memory cell pattern to be formed on the semiconductor wafer.