IP Library Granted Patent US 7,062,096
Granted Patent B2
US 7,062,096 · App. 10/206,368 · Granted Jun 13, 2006

Apparatus and method for performing bitplane coding with reordering in a fine granularity scalability coding system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,062,096
App. No.
10/206,368
Granted
Jun 13, 2006
Kind
B2
Abstract

An apparatus and method for performing bitplane coding with reordering, that may be used in a Fine Granularity Scalability (FGS) system. The apparatus and method reorder coefficients each time after a bitplane is coded. By reordering, the apparatus and method separate the coefficients into two groups. When coding a bitplane, bits in the first group are copied into the bitstream, while the bits in the second group are subject to common run-length, VLC, or arithmetic coding. The apparatus and method may also be used with or in a conventional SNR, temporal and/or spatially scalable architectures, for example, as utilized within an MPEG-4 framework.

Claims (29)

1. A bitplane encoder, comprising:

a reordering module for reordering a plurality of bit-planes beginning with a most significant bit (MSB) to produce reordered coefficients and non-reordered coefficients, which make up a reordered bitplane; and

a bitplane encoding module for receiving the reordered bitplane and for encoding the reordered bitplane to produce a compressed output stream, said bitplane encoding module encoding the reordered bitplane using at least one of run-length and variable-length encoding, wherein the compressed output stream includes encoded data from the non-reordered coefficients and raw data from the reordered coefficients.

2. The bitplane encoder of claim 1 , wherein said bitplane encoder is implemented in hardware and/or software.

3. A fine granularity scalability (FGS) enhancement encoder including the bitplane encoder of claim 1 .

4. The FGS enhancement encoder of claim 3 , wherein the FGS enhancement encoder performs at least one of signal-to-noise ratio, temporal, or spatial scalability enhancement.

5. A fine granularity scalability (FGS) encoder including the bitplane encoder of claim 1 .

6. The FGS encoder of claim 5 , wherein the FGS encoder performs at least one of signal-to-noise ratio, temporal, or spatial scalability enhancement.

7. A studio including the bitplane encoder of claim 1 , said studio for performing at least one of browsing, archiving, cataloging, transcoding from a first format to a second format, editing, and streaming.

8. A method of bitplane encoding, comprising:

reordering a plurality of bit-planes beginning with a most significant bit (MSB) to produce reordered coefficients and non-reordered coefficients, which make up a reordered bitplane; and

encoding the reordered bitplane using at least one of run-length and variable-length encoding to produce a compressed output stream, wherein the compressed output stream includes encoded data from the non-reordered coefficients and raw data from the reordered coefficients.

9. A bitplane decoding module for receiving inverse reordered coefficients and non-inverse reordered coefficients and for decoding the non-inverse reordered coefficients and not the inverse reordered coefficients to produce an output stream.

10. The bitplane decoding module of claim 9 , wherein said inverse reordering module is implemented in hardware and/or software.

11. A bitplane decoder, comprising:

an inverse reordering module for receiving an encoded, reordered bitplane and performing inverse reordering on the encoded, reordered bitplane beginning with a most significant bit (MSB) to produce inverse reordered coefficients and non-inverse reordered coefficients; and

a bitplane decoding module for receiving the inverse reordered coefficients and the non-inverse reordered coefficients and for decoding the non-inverse reordered coefficients and not the inverse reordered coefficients to produce an output stream.

12. The bitplane decoder of claim 11 , said bitplane decoding module decoding the non-inverse reordered coefficients using at least one of run-length and variable-length decoding, wherein the output stream includes decoded data from the non-inverse reordered coefficients and raw data from the inverse reordered coefficients.

13. The bitplane decoder of claim 11 , wherein said bitplane decoder is implemented in hardware and/or software.

14. A fine granularity scalability (FGS) decoder including the bitplane decoder of claim 11 .

15. The FGS decoder of claim 14 , wherein the FGS decoder performs at least one of signal-to-noise ratio, temporal, or spatial scalability enhancement.

16. A studio including the bitplane decoder of claim 11 , said studio for performing at least one of browsing, archiving, cataloging, transcoding from a first format to a second format, editing, and streaming.

17. A method of decoding, comprising:

receiving inverse reordered coefficients and non-inverse reordered coefficients and for decoding the non-inverse reordered coefficients and not the inverse reordered coefficients to produce an output stream.

18. The method of claim 17 , wherein said decoding method is implemented in hardware and/or software.

19. A method of decoding, comprising:

receiving an encoded, reordered bitplane and inverse reordering the encoded, reordered bitplane beginning with a most significant bit (MSB) to produce inverse reordered coefficients and non-inverse reordered coefficients; and

decoding the non-inverse reordered coefficients and not the inverse reordered coefficients to produce an output stream.

20. The method of claim 19 , said decoding step decoding the non-inverse reordered coefficients using at least one of run-length and variable-length decoding, wherein the output stream includes decoded data from the non-inverse reordered coefficients and raw data from the inverse reordered coefficients.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2018
From: PANASONIC CORPORATION
To: SOVEREIGN PEAK VENTURES, LLC
Reel/Frame 047914/0675 →
CHANGE OF NAME Recorded Oct 29, 2018
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 047346/0494 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2005
From: LIN, HANRONG; BUSHMITCH, DENNIS
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD
Reel/Frame 017402/0732 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2003
From: LIN, WANRONG; BUSHMITCH, DENNIS
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 013683/0015 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2002
From: LIN, WANRONG; BUSHMITCH, DENNIS
To: MATSUSHITA ELECTRIC CORPORATION OF AMERICA
Reel/Frame 013145/0277 →