IP Library Granted Patent US 7,655,528
Granted Patent B2
US 7,655,528 · App. 10/588,959 · Granted Feb 2, 2010

Manufacturing method of semiconductor device

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Quick Facts
Patent No.
US 7,655,528
App. No.
10/588,959
Granted
Feb 2, 2010
Kind
B2
Abstract

SiH 3 CH 3 having the concentration of 1 to 10% is diluted with H 2 and a portion of the diluted SiH 3 CH 3 , GeH 4 and SiH 4 (or DCS) are respectively supplied to a chamber of an epitaxial device at predetermined flow rates, and SiGe:C is formed by an epitaxial growth technique. By diluting the SiH 3 CH 3 , the concentration of oxygen-based impurity contained in the SiH 3 CH 3 is reduced and hence, the oxygen-based impurity which is supplied to a chamber are reduced whereby the concentration of oxygen-based impurity contained in the SiGe:C formed in a film is reduced.

Claims (25)

1. A manufacturing method of a semiconductor device comprising the steps of:

(a) preparing a first raw material gas which contains a silane-based compound gas containing carbon atoms with the first concentration of 0.3% or more in a first hydrogen gas;

(b) producing a first diluted raw material gas containing the silane-based compound gas with the second concentration lower than the first concentration by diluting the first raw material gas with a second hydrogen gas;

(c) supplying, after the step (b), a first portion of the first diluted raw material gas into the inside of a reaction chamber in which a wafer to be processed is accommodated, through a mass flow controller; and

(d) forming a SiGe:C epitaxial layer or a SiGe:C-based epitaxial layer on a first main surface of the wafer to be processed using a gas containing germanium atoms and the first portion of the supplied first diluted raw material gas supplied through the mass flow controller,

wherein a remaining second portion of the first diluted raw material gas is not supplied to the inside of the reaction chamber through the mass flow controller, and is discharged without flowing through the mass flow controller.

2. A manufacturing method of a semiconductor device according to claim 1 , wherein the first hydrogen gas and the second hydrogen gas have the substantially same concentration composition.

3. A manufacturing method of a semiconductor device according to claim 2 , wherein the purity of the second hydrogen gas is 99.99% or more.

4. A manufacturing method of a semiconductor device according to claim 1 , wherein the reaction chamber is an epitaxial layer forming reaction chamber of a single wafer epitaxial device.

5. A manufacturing method of a semiconductor device according to claim 1 , wherein the reaction chamber is an epitaxial layer forming reaction chamber of a batch-type epitaxial device.

6. A manufacturing method of a semiconductor device according to claim 1 , wherein the epitaxial layer constitutes a portion of a base region of a HBT.

7. A manufacturing method of a semiconductor device according to claim 1 , wherein the epitaxial layer is a channel region of a strain SiGe-based MISFET.

8. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of dilution of the first diluted raw material gas is set to a value which falls within a range from 2 to 100.

9. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of dilution of the first diluted raw material gas is set to a value which falls within a range from 3 to 50.

10. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of dilution of the first diluted raw material gas is set to a value which falls within a range from 4 to 20.

11. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of dilution of the first diluted raw material gas is set to a value which falls within a range from 6 to 15.

12. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of introduction of the first diluted raw material gas is set to a value which falls within a range from 2 to 100.

13. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of introduction of the first diluted raw material gas is set to a value which falls within a range from 3 to 50.

14. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of introduction of the first diluted raw material gas is set to a value which falls within a range from 4 to 20.

15. A manufacturing method of a semiconductor device according to claim 1 , wherein the degree of introduction of the first diluted raw material gas is set to a value which falls within a range from 6 to 15.

16. A manufacturing method of a semiconductor device according to claim 1 , wherein the first concentration is equal to or more than 0.6%.

17. A manufacturing method of a semiconductor device according to claim 1 , wherein the first concentration is equal to or more than 1%.

18. A manufacturing method of a semiconductor device according to claim 1 , wherein the first concentration is equal to or more than 2%.

19. A manufacturing method of a semiconductor device according to claim 1 , wherein the first concentration is equal to or more than 5%.

20. A manufacturing method of a semiconductor device according to claim 1 , wherein said remaining second portion is discharged from a vent line.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Jul 30, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025204/0512 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2006
From: EGUCHI, SATOSHI; KANAI, AKIRA; MIYASHITA, ISAO; NAGASHIMA, SEIGO
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 018177/0159 →