IP Library Granted Patent US 6,982,182
Granted Patent B2
US 6,982,182 · App. 10/620,137 · Granted Jan 3, 2006

Moisture passivated planar index-guided VCSEL

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Quick Facts
Patent No.
US 6,982,182
App. No.
10/620,137
Granted
Jan 3, 2006
Kind
B2
Abstract

Systems and methods of passivating planar index-guided oxide vertical cavity surface emitting lasers (VCSELs) are described. These systems and methods address the unique susceptibility of these devices to damage that otherwise might be caused by moisture intrusion into the etch holes that are used to form the index-guiding confinement regions. In one aspect, a VCSEL includes a vertical stack structure having a substantially planar top surface. The vertical stack structure includes a top mirror, a bottom mirror, and a cavity region disposed between the top mirror and the bottom mirror and including an active light generation region. At least one of the top mirror and the bottom mirror has a layer with a peripheral region that is oxidized into an electrical insulator as a result of exposure to an oxidizing agent. The vertical stack structure defines two or more etched holes each extending from the substantially planar top surface to the oxidized peripheral region. Each of the etched holes is moisture passivated by an overlying moisture penetration barrier.

Claims (17)

1. A method of manufacturing a vertical cavity surface emitting laser (VCSEL), comprising:

forming a vertical stack structure having a substantially planar top surface, including

a top mirror,

a bottom mirror,

a cavity region disposed between the top mirror and the bottom mirror and including an active light generation region,

at least one of the top mirror and the bottom mirror having a layer with a peripheral region oxidized into an electrical insulator as a result of exposure to an oxidizing agent, wherein the vertical stack structure defines two or more etched holes each extending from the substantially planar top surface to the oxidized peripheral region; and

passivating each of the etched holes by an overlying moisture penetration barrier.

2. The method of claim 1 , wherein the moisture penetration barrier has a thickness selected to prevent substantial vertical moisture intrusion into the etched holes.

3. The method of claim 2 , wherein the moisture penetration barrier comprises a silicon nitride layer having a thickness of approximately 300 nm or greater.

4. The method of claim 3 , wherein the moisture penetration barrier comprises a silicon nitride layer having a thickness of approximately 500 nm or greater.

5. The method of claim 1 , wherein each of the etched holes is moisture passivated by an overlying moisture penetration barrier having a lateral surface area sufficient to prevent substantial delamination of the moisture penetration barrier.

6. The method of claim 1 , wherein multiple etched holes are moisture passivated by a single continuous film of moisture penetration barrier material.

7. The method of claim 1 , further comprising disposing a top electrode over the substantially planar top surface of the vertical stack structure and circumscribing a light emission region substantially free of any overlying moisture penetration barrier material.

8. The method of claim 7 , wherein the moisture penetration barrier covers a major portion of the top surface of the vertical stack structure other than the top electrode and the light emission region.

9. The method of claim 1 , wherein:

the moisture penetration barrier includes a peripheral edge intersecting the top surface of the vertical stack structure at a moisture penetration interface; and

at the top surface of the vertical stack structure each of the etched holes is circumscribed by a respective peripheral edge having a substantial portion separated from the moisture penetration interface by a distance sufficient to prevent substantial lateral moisture intrusion into the etched holes.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 017207 FRAME 0020. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038633/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD
To: EPISTAR CORPORATION
Reel/Frame 034221/0681 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Sep 17, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 033764/0704 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0672 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
Reel/Frame 017675/0294 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017207/0020 →