IP Library Granted Patent US 7,259,630
Granted Patent B2
US 7,259,630 · App. 10/625,761 · Granted Aug 21, 2007

Elimination of peak clipping and improved efficiency for RF power amplifiers with a predistorter

Assignee: Andrew Corporation
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Quick Facts
Patent No.
US 7,259,630
App. No.
10/625,761
Granted
Aug 21, 2007
Kind
B2
Abstract

A predistorer configured for use with an RF power amplifier having an input loop configured to be coupled to the input of the RF power amplifier and peak control circuit. Such an input loop includes a look-up table containing predistortion values to be applied to an input signal, in response to the power in the input signal, for forming a predistorted input signal. The predistorter may further include an output loop, such an output loop configured to measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal, and operable to update the predistortion values in the look-up table. Such a peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal.

Claims (146)

1. A predistorter configured for use with an RF power amplifier, the predistorter comprising:

an input loop configured to be coupled to the input of an RF power amplifier, the input loop including a look-up table containing predistortion values, the input loop configured to apply the predistortion values to an input signal, in response to a monotonically increasing function of the input signal power, for forming a predistorted input signal;

a peak control circuit coupled to the input loop, the peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal; and

an output loop coupled to the output of the RF power amplifier, the output loop tunable to frequency select a portion of a frequency band and measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal and disposed in the selected portion of the frequency band, the output loop operable to update the predistortion values in the look-up table responsive to the measured intermodulation distortion product.

2. The predisorter of claim 1 , wherein the monotonically increasing function of the input signal power includes at least one of the input power, the logarithm of the input power, and the square root of the input power.

3. The predistorter of claim 1 , wherein the intermodulation distortion product is at least one of the third and the fifth intermodulation distortion products.

4. The predistorter of claim 1 , wherein the output loop comprises:

a coupler coupled to the output of the RF power amplifier;

a mixer coupled to the coupler;

a local oscillator coupled to the mixer and configured to output a frequency so that the mixer selects at least one of the third and the fifth intermodulation distortion products of the RE power amplifier;

an amplifier coupled to the mixer and configured to amplify at least one of the third and the fifth intermodulation distortion products;

a bandpass filter coupled to the amplifier and configured to frequency select at least one of the third and the fifth intermodulation distortion products;

an intermediate frequency to baseband converter circuit coupled to the bandpass filter and configured to produce a digital signal representative of the magnitude of at least one of the third and the fifth intermodulation distortion products; and

a processor coupled to the intermediate frequency to baseband converter circuit and the look-up table and configured to select an optimal set of predistortion values.

5. The predistorter of claim 1 , wherein the output loop comprises a processor, the processor configured to select an optimal set of predistortion values using a gradient search.

6. The predistorter of claim 1 , wherein the output loop comprises a processor, the processor configured to apply a spline function to update predistortion values in the look-up table.

7. The predistorter of claim 6 , wherein the application of the spline function involves analyzing amplitude to amplitude and amplitude to phase predistortion curves.

8. The predistorter of claim 6 , wherein the spline function has knots and wherein the application of the spline function involves varying the magnitude of each knot, generating predistortion values, and measuring an intermodulation distortion product to determine whether the change in the magnitude of the knot improved the intermodulation distortion performance.

9. The predistorter of claim 6 , wherein the look-up table has an index and the spline function includes knots that are place along the look-up table index; and, wherein knot placement along the look-up table index is varied.

10. The predistorter of claim 1 , wherein the input signal is of the type of at least one of I+jQ and A(t)cos[ωt+θ(t)].

11. The predistorter of claim 1 , wherein the input signal is of the type I+jQ, the predistortion values in the look-up table are in in-phase and quadrature-phase form, and the input loop comprises:

a magnitude detection circuit coupled to the look-up table and configured to produce a scalar value representative of the power of the input signal, the scalar value functioning as an index to the look-up table;

a complex multiplier coupled to the look-up table and configured to combine predistortion values in the look-up table with the input signal and output a predistortion signal;

first and second digital-to-analog converters coupled to the complex multiplier and configured to convert the predistortion signal from a digital signal to analog signals;

quadrature modulator coupled to the first and second digital-to-analog converters and configured to apply the analog signals to a carrier signal; and

an RF oscillator coupled to the quadrature modulator and configured to provide a carrier signal.

12. The predistorter of claim 1 , wherein the input signal is of the type I+jQ, the predistortion values in the look-up table are in the form of magnitude and phase, and the input loop comprises:

a first converter circuit coupled to the look-up table and configured to convert the input signal into magnitude and phase form, the magnitude functioning as an index to the look-up table;

a multiplier circuit coupled to the first converter circuit and the look-up table, the multiplier circuit configured to combine a magnitude predistortion value in the look-up table with the magnitude of input signal;

an adder circuit coupled to the first converter circuit and the look-up table, the adder circuit configured to combine a phase predistortion value in the look-up table with the phase of input signal;

a second converter circuit coupler the multiplier circuit and the adder circuit and configured to output a predistortion signal;

first and second digital-to-analog converters coupled to the second converter circuit and configured to convert the predistortion signal from a digital signal to analog signals;

a quadrature modulator coupled to the first and second of digital-to-analog converters and configured to apply the analog signals to a carrier signal; and

an RF oscillator coupled to the quadrature modulator and configured to provide a carrier signal.

13. The predistorter of claim 1 , wherein the input signal is of the type A(t)cos[ωt+θ(t)], the predistortion values in the look-up table are in the form of magnitude and phase, and the input loop comprises:

an envelope detection circuit coupled to the look-up table and configured to produce a scalar value representative of the power of the input signal;

an analog-to-digital converter circuit coupled to the detector circuit and the look-up table, the analog-to-digital converter circuit configured to convert the scalar value to a digital signal that functions as an index to the look-up table;

a complex attenuator coupled to the look-up table and configured to combine predistortion values in the look-up table with the input signal; and

a delay circuit coupled to the complex attenuator and configured to delay the application of the input signal to the complex attenuator.

14. The predistorter of claim 13 , wherein the complex attenuator comprises:

a power attenuator; and

a phase shifter.

15. The predistorter of claim 13 , wherein the complex attenuator comprises a vector modulator.

16. The predistorter of claim 1 , wherein the peak control circuit comprises:

a threshold detector configured with at least one of a high power threshold and a low power threshold; and,

a power supply having a nominal voltage and a selectable voltage based on at least one of the high power threshold and the low power threshold.

17. An amplifier system comprising an RF power amplifier and a predistorter, the predistorter comprising:

an input loop configured to be coupled to the input of an RF power amplifier, the input loop including a look-up table containing predistortion values, the input loop configured to apply the predistortion values to an input signal, in response to a monotonically increasing function of the input signal power, for forming a predistorted input signal;

a peak control circuit coupled to the input loop, the peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal; and

an output loop coupled to the output of the RF power amplifier, the output loop tunable to frequency select a portion of a frequency band and measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal and disposed in the selected portion of the frequency band, the output loop operable to update the predistortion values in the look-up table responsive to the measured intermodulation distortion product.

18. The amplifier system of claim 17 , wherein the monotonically increasing function of the input signal power includes at least one of the input power, the logarithm of the input power, and the square root of the input power.

19. The amplifier system of claim 17 , wherein the intermodulation distortion product is at least one of the third and the fifth intermodulation distortion products.

20. The amplifier system of claim 17 , wherein the output loop comprises:

a coupler coupled to the output of the RF power amplifier;

a mixer coupled to the coupler;

a local oscillator coupled to the mixer and configured to output a frequency so that the mixer selects at least one of the third and the fifth intermodulation distortion products of the RF power amplifier;

an amplifier coupled to the mixer and configured to amplify at least one of the third and the fifth intermodulation distortion products;

a bandpass filter coupled to the amplifier and configured to frequency select at least one of the third and the fifth intermodulation distortion products;

an intermediate frequency to baseband converter circuit coupled to the bandpass filter and configured to produce a digital signal representative of the magnitude of at least one of the third and the fifth intermodulation distortion products; and

a processor coupled to the intermediate frequency to baseband converter circuit and the look-up table and configured to select an optimal set of predistortion values.

21. The amplifier system of claim 17 , wherein the output loop comprises a processor, the processor configured to select an optimal set of predistortion values using a gradient search.

22. The amplifier system of claim 17 , wherein the output loop comprises a processor, the processor configured to apply a spline function to update predistortion values in the look-up table.

23. The amplifier system of claim 22 , wherein the application of the spline function involves analyzing amplitude to amplitude and amplitude to phase predistortion curves.

24. The amplifier system of claim 22 , wherein the spline function has knots and wherein the application of the spline function involves varying the magnitude of each knot, generating predistortion values, and measuring an intermodulation distortion product to determine whether the change in the magnitude of the knot improved the intermodulation distortion performance.

25. The amplifier system of claim 22 , wherein the look-up table has an index and the spline function includes knots that are place along the look-up table index; and, wherein knot placement along the look-up table index is varied.

26. The amplifier system of claim 17 , wherein the input signal is of the type of at least one of I+jQ and A(t)cos[ωt+θ(t)].

27. The amplifier system of claim 17 , wherein the input signal is of the type I+jQ, the predistortion values in the look-up table are in in-phase and quadrature-phase form, and the input loop comprises:

a magnitude detection circuit coupled to the look-up table and configured to produce a scalar value representative of the power of the input signal, the scalar value functioning as an index to the look-up table;

a complex multiplier coupled to the look-up table and configured to combine predistortion values in the look-up table with the input signal and output a predistortion signal;

first and second digital-to-analog converters coupled to the complex multiplier and configured to convert the predistortion signal from a digital signal to analog signals;

a quadrature modulator coupled to the first and second digital-to-analog converters and configured to apply the analog signals to a carrier signal; and

an RF oscillator coupled to the quadrature modulator and configured to provide a carrier signal.

28. The amplifier system of claim 17 , wherein the input signal is of the type I+jQ, the predistortion values in the look-up table are in the form of magnitude and phase, and the input loop comprises:

a first converter circuit coupled to the look-up table and configured to convert the input signal into magnitude and phase form, the magnitude functioning as an index to the look-up table;

a multiplier circuit coupled to the first converter circuit and the look-up table, the multiplier circuit configured to combine a magnitude predistortion value in the look-up table with the magnitude of input signal;

an adder circuit coupled to the first converter circuit and the look-up table, the adder circuit configured to combine a phase predistortion value in the look-up table with the phase of input signal;

a second converter circuit coupler the multiplier circuit and the adder circuit and configured to output a predistortion signal;

first and second digital-to-analog converters coupled to the second converter circuit and configured to convert the predistortion signal from a digital signal to analog signals;

a quadrature modulator coupled to the first and second digital-to-analog converters and configured to apply the analog signals to a carrier signal; and

an RF oscillator coupled to the quadrature modulator and configured to provide a carrier signal.

29. The amplifier system of claim 17 , wherein the input signal is of the type A(t)cos [ωt+θ(t)], the predistortion values in the look-up table are in the form of magnitude and phase, and the input loop comprises:

an envelope detection circuit coupled to the look-up table and configured to produce a scalar value representative of the power of the input signal;

an analog-to-digital Converter circuit coupled to the envelope detection circuit and the look-up table, the analog-to-digital converter circuit configured to convert the scalar value to a digital signal that functions as an index to the look-up table;

a complex attenuator coupled to the look-up table and configured to combine predistortion values in the look-up table with the input signal; and

a delay circuit coupled to the complex attenuator and configured to delay the application of the input signal to the complex attenuator.

30. The amplifier system of claim 29 , wherein the complex attenuator comprises:

a power attenuator; and

a phase shifter.

31. The amplifier system of claim 29 , wherein the complex attenuator comprises a vector modulator.

32. The amplifier system of claim 17 , wherein the peak control circuit comprises:

a threshold detector configured with at least one of a high power threshold and a low power threshold; and

a power supply having a nominal voltage and a selectable voltage based on at least one of the high power threshold and the low power threshold.

33. A method of predistorting an input signal applied to an RF power amplifier, the method comprising:

producing a scalar value representative of the power of the input signal;

applying the scalar value to index a look-up table containing predistortion values;

combining the predistortion values with the input signal to improve the linearity of the RF power amplifier;

applying the scalar to a threshold to select a power supply voltage for the RF power amplifier; and

frequency selecting a portion of a frequency band for an output of the RF power amplifier using a tunable output loop and measuring an intermodulation distortion product disposed in the selected portion of the frequency band for the output of the RF power amplifier to select optimal predistortion values based upon the measured intermodulation distortion product.

34. The method of claim 33 , wherein the intermodulation distortion product is at least one of the third and the fifth intermodulation distortion products.

35. The method of claim 33 , wherein the optimal predistortion values are selected using a gradient search.

36. The method of claim 35 , further comprising updating the predistortion values in the table.

37. The method of claim 35 , wherein the predistortion values are updated by applying a spline function to the amplitude to amplitude and amplitude to phase characteristics of the RF power amplifier.

38. The method of claim 35 , wherein the spline function has knots, and wherein the application of the spline function involves varying the magnitude of each knot, generating predistortion values, and measuring an intermodulation distortion product to determine whether the change in the magnitude of the knot improved the intermodulation distortion performance.

39. The method of claim 35 , wherein the spline function includes knots that are placed along the look-up table index; and, wherein knot placement along the look-up table index is varied.

40. The predistorter of claim 1 , wherein the output loop comprises:

a filter coupled to the output of the RF power amplifier and configured to frequency select the selected portion of the frequency band;

an intermediate frequency to baseband converter circuit coupled to the filter and configured to produce a digital signal representative of the magnitude of the intermodulation distortion product in the selected portion of the frequency band; and

a processor coupled to the intermediate frequency to baseband converter circuit and the look-up table and configured to select an optimal set of predistortion values.

41. The predistorter of claim 40 , wherein the filter is a bandpass filter, and wherein the output loop further comprises:

a coupler coupled to the output of the RF power amplifier;

a mixer coupled to the coupler;

a tunable local oscillator coupled to the mixer and configured to output a frequency so that the mixer selects the selected portion of the frequency band; and

an amplifier coupled to the mixer and configured to amplify the selected portion of the frequency band;

wherein the coupler, mixer, tunable oscillator and amplifier and coupled intermediate the RF power amplifier and the bandpass filter.

42. The amplifier system of claim 17 , wherein the output loop comprises:

a filter coupled to the output of the RF power amplifier and configured to frequency select the selected portion of the frequency band;

an intermediate frequency to baseband converter circuit coupled to the filter and configured to produce a digital signal representative of the magnitude of the intermodulation distortion product in the selected portion of the frequency band; and

a processor coupled to the intermediate frequency to baseband converter circuit and the look-up table and configured to select an optimal set of predistortion values.

43. The amplifier system of claim 42 , wherein the filter is a bandpass filter, and wherein the output loop further comprises:

a coupler coupled to the output of the RF power amplifier;

a mixer coupled to the coupler;

a tunable local oscillator coupled to the mixer and configured to output a frequency so that the mixer selects the selected portion of the frequency band; and

an amplifier coupled to the mixer and configured to amplify the selected portion of the frequency band;

wherein the coupler, mixer, tunable oscillator and amplifier and coupled intermediate the RF power amplifier and the bandpass filter.

44. A predistorter configured for use with an RF power amplifier, the predistorter comprising:

an input loop configured to be coupled to the input of an RF power amplifier, the input loop including a look-up table containing predistortion values, the input loop configured to apply the predistortion values to an input signal, in response to a monotonically increasing function of the input signal power, for forming a predistorted input signal;

a peak control circuit coupled to the input loop, the peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal; and

an output loop coupled to the output of the RF power amplifier, the output loop configured to measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal, the output loop operable to update the predistortion values in the look-up table responsive to the measured intermodulation distortion product, wherein the output loop comprises:

a coupler coupled to the output of the RF power amplifier;

a mixer coupled to the coupler;

a local oscillator coupled to the mixer and configured to output a frequency so that the mixer selects at least one of the third and the fifth intermodulation distortion products of the RF power amplifier;

an amplifier coupled to the mixer and configured to amplify at least one of the third and the fifth intermodulation distortion products;

a bandpass filter coupled to the amplifier and configured to frequency select at least one of the third and the fifth intermodulation distortion products;

an intermediate frequency to baseband converter circuit coupled to the bandpass filter and configured to produce a digital signal representative of the magnitude of at least one of the third and the fifth intermodulation distortion products; and

a processor coupled to the intermediate frequency to baseband converter circuit and the look-up table and configured to select an optimal set of predistortion values.

45. An amplifier system comprising an RF power amplifier and a predistorter, the predistorter comprising:

an input loop configured to be coupled to the input of an RF power amplifier, the input loop including a look-up table containing predistortion values, the input loop configured to apply the predistortion values to an input signal, in response to a monotonically increasing function of the input signal power, for forming a predistorted input signal;

a peak control circuit coupled to the input loop, the peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal; and

an output loop coupled to the output of the RF power amplifier, the output loop configured to measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal, the output loop operable to update the predistortion values in the look-up table responsive to the measured intermodulation distortion product, wherein the output loop comprises:

a coupler coupled to the output of the RF power amplifier;

a mixer coupled to the coupler;

a local oscillator coupled to the mixer and configured to output a frequency so that the mixer selects at least one of the third and the fifth intermodulation distortion products of the RF power amplifier;

an amplifier coupled to the mixer and configured to amplify at least one of the third and the fifth intermodulation distortion products;

a bandpass filter coupled to the amplifier and configured to frequency select at least one of the third and the fifth intermodulation distortion products;

an intermediate frequency to baseband converter circuit coupled to the bandpass filter and configured to produce a digital signal representative of the magnitude of at least one of the third and the fifth intermodulation distortion products; and

a processor coupled to the intermediate frequency to baseband converter circuit and the look-up table and configured to select an optimal set of predistortion values.

Assignments (16)
RELEASE OF SECURITY INTEREST AT REEL/FRAME 049905/0504 Recorded Dec 19, 2024
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: ARRIS ENTERPRISES LLC (F/K/A ARRIS ENTERPRISES, INC.); ARRIS TECHNOLOGY, INC.; ARRIS SOLUTIONS, INC.; COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC; RUCKUS WIRELESS, LLC (F/K/A RUCKUS WIRELESS, INC.)
Reel/Frame 071477/0255 →
SECURITY INTEREST Recorded Nov 19, 2021
From: ARRIS SOLUTIONS, INC.; ARRIS ENTERPRISES LLC; COMMSCOPE TECHNOLOGIES LLC; COMMSCOPE, INC. OF NORTH CAROLINA; RUCKUS WIRELESS, INC.
To: WILMINGTON TRUST
Reel/Frame 060752/0001 →
TERM LOAN SECURITY AGREEMENT Recorded Jul 3, 2019
From: COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC; ARRIS ENTERPRISES LLC; ARRIS TECHNOLOGY, INC.; RUCKUS WIRELESS, INC.; ARRIS SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 049905/0504 →
ABL SECURITY AGREEMENT Recorded Jul 3, 2019
From: COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC; ARRIS ENTERPRISES LLC; ARRIS TECHNOLOGY, INC.; RUCKUS WIRELESS, INC.; ARRIS SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 049892/0396 →
PATENT SECURITY AGREEMENT Recorded Jul 3, 2019
From: COMMSCOPE TECHNOLOGIES LLC
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 049892/0051 →
RELEASE OF SECURITY INTEREST Recorded Apr 9, 2019
From: JPMORGAN CHASE BANK, N.A.
To: REDWOOD SYSTEMS, INC.; ALLEN TELECOM LLC; ANDREW LLC; COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC
Reel/Frame 049260/0001 →
RELEASE OF SECURITY INTEREST Recorded Apr 9, 2019
From: JPMORGAN CHASE BANK, N.A.
To: REDWOOD SYSTEMS, INC.; ALLEN TELECOM LLC; ANDREW LLC; COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC
Reel/Frame 048840/0001 →
RELEASE OF SECURITY INTEREST PATENTS (RELEASES RF 036201/0283) Recorded Mar 31, 2017
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: ALLEN TELECOM LLC; COMMSCOPE TECHNOLOGIES LLC; COMMSCOPE, INC. OF NORTH CAROLINA; REDWOOD SYSTEMS, INC.
Reel/Frame 042126/0434 →
SECURITY INTEREST Recorded Jul 28, 2015
From: ALLEN TELECOM LLC; COMMSCOPE TECHNOLOGIES LLC; COMMSCOPE, INC. OF NORTH CAROLINA; REDWOOD SYSTEMS, INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 036201/0283 →
CHANGE OF NAME Recorded Mar 25, 2015
From: ANDREW LLC
To: COMMSCOPE TECHNOLOGIES LLC
Reel/Frame 035285/0057 →
SECURITY AGREEMENT Recorded May 4, 2011
From: ALLEN TELECOM LLC, A DELAWARE LLC; ANDREW LLC, A DELAWARE LLC; COMMSCOPE, INC OF NORTH CAROLINA, A NORTH CAROLINA CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 026272/0543 →
SECURITY AGREEMENT Recorded May 3, 2011
From: ALLEN TELECOM LLC, A DELAWARE LLC; ANDREW LLC, A DELAWARE LLC; COMMSCOPE, INC. OF NORTH CAROLINA, A NORTH CAROLINA CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 026276/0363 →
PATENT RELEASE Recorded Feb 3, 2011
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: COMMSCOPE, INC. OF NORTH CAROLINA; ALLEN TELECOM LLC; ANDREW LLC (F/K/A ANDREW CORPORATION)
Reel/Frame 026039/0005 →
CHANGE OF NAME Recorded Oct 31, 2008
From: ANDREW CORPORATION
To: ANDREW LLC
Reel/Frame 021763/0469 →
SECURITY AGREEMENT Recorded Jan 9, 2008
From: COMMSCOPE, INC. OF NORTH CAROLINA; ALLEN TELECOM, LLC; ANDREW CORPORATION
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 020362/0241 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2003
From: BACHMAN, THOMAS A., II; LOVINGGOOD, BRECK W.
To: ANDREW CORPORATION
Reel/Frame 014324/0887 →
Continuity (1)
Related Publication 20050017801A1 · Jan 27, 2005