Thin-film transistor with set trap level densities, and method of manufactures

1. A thin-film transistor comprising:

an electroconductive film;

a first insulating film located on the electroconductive film;

an active layer located on the first insulating film,

the active layer having a source region, a drain region, and a channel region intermediate the source region and the drain region,

the active layer including an interface region adjacent the first insulating film;

a gate insulating film located on the active layer; and

a gate electrode located on the gate insulating film, wherein,

a first trap level density of the source and drain regions in the interface region, is higher than a second trap level density of the channel region in the interface region.

2. The thin-film transistor according to claim 1 ,

wherein said first trap level density is at least about 5×10 12 /cm 2 .

3. The thin-film transistor according to claim 1 , wherein,

said electroconductive film comprises a light-absorbing film and a light-reflecting film, and

said light-absorbing film faces said active layer.

4. The thin-film transistor according to claim 3 , wherein, a light-reflecting film and a light-absorbing film contact each other.

5. The thin-film transistor according to claim 1 , wherein,

said source region and said drain region are of a first conduction type,

said active layer further comprises a first low-concentration carrier region between said source region and said channel region and a second low-concentration carrier region between said drain region and said channel region,

the first and second low-concentration carrier regions are of the first conduction type, and

the first and second low-concentration carrier regions have impurity concentrations lower than impurity concentrations in said source region and said drain region.

6. A TFT substrate, comprising:

an optically transparent substrate;

a plurality of the thin-film transistors, according to claim 1 , with the electroconductive film of each of said transistors formed on the optically transparent substrate; and

a display element electrode connected to each of said thin-film transistors.

7. A liquid crystal display device, comprising:

the TFT substrate according to claim 6 ;

a counter substrate opposed to said TFT substrate; and

a liquid crystal layer between said TFT substrate and said counter substrate.

8. A method of manufacturing a thin-film transistor, comprising the sequential steps of:

successively forming an active layer, a gate insulating film and a gate electrode on at least one layer of an electroconductive film with a first insulating film interposed therebetween; and

introducing a desired trap level density, into a surface of the active layer, adjacent an interface with the first insulating film, by causing a current, of at least a predetermined value, to flow in the first insulating film between the active layer and the electroconductive film.

9. The method of claim 8 , wherein,

the step of introducing a trap level density provides sufficient current to deteriorate the first insulating film and provide crystal defects sufficient to introduce the desired trap level density in a source region and a drain region of the active layer.

10. The method of claim 9 , wherein,

the step of introducing a trap level density maintains the current for a period of 1 to 10 minutes,

another trap level density is introduced into a first carrier region, of the active layer, adjacent the source region, and

the another trap level density is introduced into a second carrier region, of the active layer, adjacent the drain region.

11. The method of claim 8 , wherein,

the step of introducing a trap level density comprises applying a potential to the electroconductive film to cause the current flowing, in the first insulating film between the active layer and the electroconductive film, to have a current density of at least about 2.5 A/m 2 in the first insulating film.

12. The method of claim 8 , wherein,

the step of introducing a trap level density comprises applying a potential to cause the current flowing, in the first insulating film between the active layer and the electroconductive film, to electrically stress a crystallinity of the first insulating film to cause crystal defects sufficient to provide desired trap level densities in a source region, a drain region, and carrier regions of the active layer.

13. The method of claim 8 , wherein,

a first trap level density in a source region of the active layer and a drain region of the active layer is higher than a second trap level density in a channel region of the active layer.

14. A method of manufacturing a thin-film transistor, comprising the steps of:

forming a first insulating film on an upper surface of an electroconductive film;

doping an upper surface of the first insulating film with impurity ions to introduce a trap level density into the upper surface; and

successively forming an active layer, a gate insulating film and a gate electrode on the upper surface of the first insulating film,

wherein the upper surface becomes a surface portion of the active layer facing the electroconductive film.

15. The method of claim 14 , wherein a first trap level density in a source region and a drain region is higher than a second trap level density in a channel region in the surface portion of the active layer.

16. A method of manufacturing a thin-film transistor having an active layer, a gate insulating film and a gate electrode successively formed on at least one layer of an electroconductive film with a first insulating film interposed therebetween, comprising the step of:

doping a surface portion of the active layer facing the electroconductive film with impurity ions to introduce a trap level density into the surface portion of the active layer.

17. The method of claim 16 , wherein a first trap level density in a source region and a drain region is higher than a second trap level density in a channel region in the surface portion of said active layer.

18. A method of manufacturing a thin-film transistor having an active layer, a gate insulating film and a gate electrode successively formed on at least one layer of an electroconductive film with a first insulating film interposed therebetween, comprising the step of:

performing a plasma treatment on a surface portion of said first insulating film facing said active layer to introduce a trap level density into an interface between said active layer and said first insulating film.

19. The method of manufacturing a thin-film transistor according to claim 18 , wherein a first trap level density in a source region and a drain region is higher than a second trap level density in a channel region in the surface portion of said active layer.