IP Library Granted Patent US 7,554,162
Granted Patent B2
US 7,554,162 · App. 10/873,149 · Granted Jun 30, 2009

Thin film transistor substrate with low reflectance upper electrode

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Quick Facts
Patent No.
US 7,554,162
App. No.
10/873,149
Granted
Jun 30, 2009
Kind
B2
Abstract

A thin film transistor substrate includes an upper electrode for electrically connecting a transparent picture element electrode to the thin film transistor. The upper electrode includes at least a first metal layer and a second metal layer formed on the first metal layer. The second metal layer has a lower reflectance than the first metal layer and the first metal layer has a region not overlapped by the second metal layer.

Claims (16)

1. A thin film transistor substrate comprising:

a transparent insulating substrate;

a thin film transistor on the transparent insulating substrate;

a transparent picture element electrode over the thin film transistor;

a first electrode electrically connecting the transparent picture element electrode and the thin film transistor, the first electrode being distinct from said thin film transistor and including a first metal layer and a second metal layer on the first metal layer, the first metal layer has a region not overlapped by the second metal layer, the first electrode being distinct from the thin film transistor based on at least an interlayer insulating layer being between the first electrode and the thin film transistor; and

an insulating layer over said first electrode, said transparent picture element electrode contacting said first electrode through a contact hole formed in said insulating layer,

wherein the second metal layer has lower reflectance than the first metal layer, and

wherein said second metal layer is formed only in the immediate vicinity of the contact hole.

2. The thin film transistor substrate according to claim 1 , wherein the first metal layer is connected to an electrode of the thin film transistor.

3. The thin film transistor substrate according to claim 1 , further comprising a shielding film between the base substrate and the thin film transistor.

4. The thin film transistor substrate according to claim 1 , further comprising a capacitor between the first electrode and the thin film transistor.

5. The thin film transistor substrate according to claim 4 , wherein the first metal layer is a capacitive upper electrode of the capacitor.

6. The thin film transistor substrate according to claim 1 , further comprising a shielding layer over the second metal layer.

7. The thin film transistor substrate according to claim 6 , further comprising an opposite substrate that faces the thin film transistor substrate through a liquid crystal and the shielding layer is on the opposite substrate.

8. The thin film transistor substrate according to claim 1 , wherein the first metal layer is made of Al or an alloy mainly composed of Al and the second metal layer is made of high-melting point metal.

9. The thin film transistor substrate according to claim 8 , wherein the high-melting point metal is a metal selected from the group consisting of Ti, W, Mo, Ta, Cr and an alloy of two or more of these.

Assignments (4)
SECURITY INTEREST Recorded Jul 14, 2022
From: VISTA PEAK VENTURES, LLC
To: GETNER FOUNDATION LLC
Reel/Frame 060654/0430 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2018
From: GETNER FOUNDATION LLC
To: VISTA PEAK VENTURES, LLC
Reel/Frame 045469/0023 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2011
From: NEC CORPORATION
To: GETNER FOUNDATION LLC
Reel/Frame 026254/0381 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2004
From: HAYASHI, KENICHI; SHIMAMOTO, HIROFUMI; MATSUZAKI, TADAHIRO
To: NEC CORPORATION
Reel/Frame 015508/0154 →